Abstract: According to one embodiment, in a semiconductor storage device, a conductive cover is provided on a side of the principal surface, and covers at least a part of the memory and the controller. A substrate has a first notched portion and a second notched portion in an outer edge. The conductive cover has a top plate portion, a first side plate portion, a second side plate portion, a first claw portion, and a second claw portion. The first claw portion is extended from a lower end of the first side plate in a direction intersecting with the principal surface. The first claw portion is fitted into the first notched portion. The second claw portion is extended from a lower end of the second side plate in the direction intersecting with the principal surface. The second claw portion is fitted into the second notched portion.

Abstract: According to one embodiment, in a semiconductor storage device, a conductive cover is provided on a side of the principal surface, and covers at least a part of the memory and the controller. A substrate has a first notched portion and a second notched portion in an outer edge. The conductive cover has a top plate portion, a first side plate portion, a second side plate portion, a first claw portion, and a second claw portion. The first claw portion is extended from a lower end of the first side plate in a direction intersecting with the principal surface. The first claw portion is fitted into the first notched portion. The second claw portion is extended from a lower end of the second side plate in the direction intersecting with the principal surface. The second claw portion is fitted into the second notched portion.

Abstract: According to one embodiment, in a semiconductor storage device, a conductive cover is provided on a side of the principal surface, and covers at least a part of the memory and the controller. A substrate has a first notched portion and a second notched portion in an outer edge. The conductive cover has a top plate portion, a first side plate portion, a second side plate portion, a first claw portion, and a second claw portion. The first claw portion is extended from a lower end of the first side plate in a direction intersecting with the principal surface. The first claw portion is fitted into the first notched portion. The second claw portion is extended from a lower end of the second side plate in the direction intersecting with the principal surface. The second claw portion is fitted into the second notched portion.

Abstract: According to one embodiment, in a semiconductor storage device, a conductive cover is provided on a side of the principal surface, and covers at least a part of the memory and the controller. A substrate has a first notched portion and a second notched portion in an outer edge. The conductive cover has a top plate portion, a first side plate portion, a second side plate portion, a first claw portion, and a second claw portion. The first claw portion is extended from a lower end of the first side plate in a direction intersecting with the principal surface. The first claw portion is fitted into the first notched portion. The second claw portion is extended from a lower end of the second side plate in the direction intersecting with the principal surface. The second claw portion is fitted into the second notched portion.

Abstract: A storage device includes a base board and a memory chip package. The base board includes, on a first edge, a connector that is connectable to a host device and through which the storage device communicates with the host device, on a second edge that is opposite to the first edge, a first engaging portion by which the base board is fixable to the host device, and in an intermediate portion that is located between the first edge and the second edge, a second engaging portion by which the base board is fixable to the host device when an end portion of the base board between the second edge and the intermediate portion is removed. The memory chip package is disposed on a surface of the base board and between the first edge and the intermediate portion.

Abstract: A storage device includes a base board and a memory chip package. The base board includes, on a first edge, a connector that is connectable to a host device and through which the storage device communicates with the host device, on a second edge that is opposite to the first edge, a first engaging portion by which the base board is fixable to the host device, and in an intermediate portion that is located between the first edge and the second edge, a second engaging portion by which the base board is fixable to the host device when an end portion of the base board between the second edge and the intermediate portion is removed. The memory chip package is disposed on a surface of the base board and between the first edge and the intermediate portion.

Abstract: According to one embodiment, an optical disk device includes a semiconductor laser, a circuit which generates a timing signal to determine a recording pulse timing, a circuit which sets a magnitude of a current for the laser, a circuit which switches the magnitude of the current according to the timing signal, a generation circuit which generates a correction signal from the timing signal to correct response characteristics of a recording pulse, a circuit which synthesizes the correction signal and signals obtained as the switch result to determine the magnitude of the current, and a circuit which feeds the current to the laser according to the synthesis result. The generation circuit extracts high-frequency components from the signals obtained as the switch result and the signal generated by the synthesis circuit, and switches a frequency and a signal gain of each of the components, in accordance with recording pulse conditions.

Abstract: A failure detecting apparatus for an anti-skid brake control system of a motor vehicle comprises a main microcomputer for generating a hydraulic pressure control signal for controlling an actuator adapted to generate braking efforts to be applied to wheels of the motor vehicle, an auxiliary microcomputer for detecting occurrence of a failure in the main microcomputer on the basis of the hydraulic pressure control signal, a test signal generating means implemented in the main microcomputer or the auxiliary microcomputer to generate a test signal, an anti-skid brake control arithmetic means incorporated in the main microcomputer to generate a hydraulic pressure control signal on the basis of either a wheel speed signal or the test signal, and a hydraulic pressure control signal monitoring means implemented in the auxiliary microcomputer to monitor the hydraulic pressure control signal generated in response to the test signal, to thereby check the validity of the hydraulic pressure control signal.