Patents by Inventor Katsumi Nakayashiki

Katsumi Nakayashiki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9688065
    Abstract: The present invention addresses the problem of forming, using a sublimation ink, an image that is free of outline blurring on a transfer medium even when the thickness of an ink fixation layer is increased. In order to solve this problem, a transfer film 10 is provided with a base material film 11, a transfer binder layer 12, a sublimation ink layer 13, and a mask layer 14 which is provided in a region where sublimation ink is not transferred to media 100, the transfer binder layer 12 being configured from a material which is permeated by sublimation of the sublimation ink.
    Type: Grant
    Filed: March 5, 2013
    Date of Patent: June 27, 2017
    Assignee: MIMAKI ENGINEERING CO., LTD.
    Inventors: Kazuyuki Takeuchi, Katsumi Nakayashiki
  • Publication number: 20150246528
    Abstract: The present invention addresses the problem of forming, using a sublimation ink, an image that is free of outline blurring on a transfer medium even when the thickness of an ink fixation layer is increased. In order to solve this problem, a transfer film 10 is provided with a base material film 11, a transfer binder layer 12, a sublimation ink layer 13, and a mask layer 14 which is provided in a region where sublimation ink is not transferred to media 100, the transfer binder layer 12 being configured from a material which is permeated by sublimation of the sublimation ink.
    Type: Application
    Filed: March 5, 2013
    Publication date: September 3, 2015
    Inventors: Kazuyuki Takeuchi, Katsumi Nakayashiki
  • Patent number: 8947610
    Abstract: An organic EL display device includes scanning lines, video signal lines, and pixels, each including a TFT having a semiconductor layer and an organic EL layer located between a lower electrode and an upper electrode. A source electrode connecting the semiconductor layer and the lower electrode is formed of three layers including a barrier metal, an Al-containing metal, and a cap metal. The barrier metal is formed of a first layer in contact with the semiconductor layer and a second layer in contact with the Al-containing metal. Each of the first layer, the second layer, and the cap metal is formed of a metal comprising a high melting point metal, and an amount of oxygen in the first layer is larger than an amount of oxygen in the second layer.
    Type: Grant
    Filed: August 1, 2014
    Date of Patent: February 3, 2015
    Assignees: Japan Display Inc., Panasonic Liquid Crystal Display Co. Ltd.
    Inventors: Taro Asai, Jun Gotoh, Eiji Oue, Hiroaki Asuma, Katsumi Nakayashiki, Makoto Kurita
  • Publication number: 20140340606
    Abstract: An organic EL display device includes scanning lines, video signal lines, and pixels, each including a TFT having a semiconductor layer and an organic EL layer located between a lower electrode and an upper electrode. A source electrode connecting the semiconductor layer and the lower electrode is formed of three layers including a barrier metal, an Al-containing metal, and a cap metal. The barrier metal is formed of a first layer in contact with the semiconductor layer and a second layer in contact with the Al-containing metal. Each of the first layer, the second layer, and the cap metal is formed of a metal comprising a high melting point metal, and an amount of oxygen in the first layer is larger than an amount of oxygen in the second layer.
    Type: Application
    Filed: August 1, 2014
    Publication date: November 20, 2014
    Inventors: Taro ASAI, Jun GOTOH, Eiji OUE, Hiroaki ASUMA, Katsumi NAKAYASHIKI, Makoto KURITA
  • Patent number: 8817200
    Abstract: A contact resistance in a through-hole with a source or a drain electrode connected to a TFT is decreased, thereby improving the operation efficiency of a display device. In the through-hole, a source portion of the TFT is connected to a source electrode 8. The source electrode 8 is formed of three layers comprising a barrier metal, an Al alloy 82, and a cap metal 83. The barrier metal is divided into a lower layer 81a in contact with the semiconductor layer and an upper layer 81b in contact with the Al alloy. The lower layer 81a of the barrier metal is formed by sputtering, the lower layer 81a is heat-treated and, subsequently, an upper layer 81b of the base metal, the Al alloy 82, and the cap metal 83 are formed continuously by sputtering. Since the upper layer 81b of the barrier metal in contact with the Al alloy 82 is not oxidized, increase in the contact resistance in the through-hole can be prevented.
    Type: Grant
    Filed: February 16, 2011
    Date of Patent: August 26, 2014
    Assignees: Japan Display Inc., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Taro Asai, Jun Gotoh, Eiji Oue, Hiroaki Asuma, Katsumi Nakayashiki, Makoto Kurita
  • Publication number: 20110199551
    Abstract: A contact resistance in a through-hole with a source or a drain electrode connected to a TFT is decreased, thereby improving the operation efficiency of a display device. In the through-hole, a source portion of the TFT is connected to a source electrode 8. The source electrode 8 is formed of three layers comprising a barrier metal, an Al alloy 82, and a cap metal 83. The barrier metal is divided into a lower layer 81a in contact with the semiconductor layer and an upper layer 81b in contact with the Al alloy. The lower layer 81a of the barrier metal is formed by sputtering, the lower layer 81a is heat-treated and, subsequently, an upper layer 81b of the base metal, the Al alloy 82, and the cap metal 83 are formed continuously by sputtering. Since the upper layer 81b of the barrier metal in contact with the Al alloy 82 is not oxidized, increase in the contact resistance in the through-hole can be prevented.
    Type: Application
    Filed: February 16, 2011
    Publication date: August 18, 2011
    Inventors: Taro Asai, Jun Gotoh, Eiji Oue, Hiroaki Asuma, Katsumi Nakayashiki, Makoto Kurita
  • Patent number: 5989089
    Abstract: In a method of fabricating separator walls in a shape of stripes in a plan view to divide a discharge space of a plasma display panel, dried films of a predetermined height, each film being formed of a material formed of solid particles bonded with a binding agent in a shape of stripe that peters out in a plan view along longitudinal direction at the longitudinal end of the stripe is formed on a substrate; and the dried films are heated so as to burn out the binding agent as well as to melt the solid particles to stick firmly to each other.
    Type: Grant
    Filed: May 22, 1998
    Date of Patent: November 23, 1999
    Assignee: Fujitsu Limited
    Inventors: Teruo Ichiyoshi, Yoshinori Osaka, Yoshikazu Matsubara, Katsumi Nakayashiki