Abstract: A semiconductor device that is a surface mount-type device includes a nitride semiconductor chip including a silicon substrate having a first thermal expansion coefficient and an InxGayAl1-x-yN layer in contact with a surface of the silicon substrate, where 0?x?1, 0?y?1, 0?x+y?1; and a die pad including Cu and having a second thermal expansion coefficient that is greater than the first thermal expansion coefficient. A thickness of the nitride semiconductor chip is at least 0.2 mm, length L of the nitride semiconductor chip is at least 3.12 mm, and thickness tm of the die pad and length L of the nitride semiconductor chip satisfy tm?2.00×10?3×L2+0.173, tm being a thickness in mm and L being a length in mm.

Abstract: A semiconductor device that is a surface mount-type device includes a nitride semiconductor chip including a silicon substrate having a first thermal expansion coefficient and an InxGayAl1-x-yN layer in contact with a surface of the silicon substrate, where 0?x?1, 0?y?1, 0?x+y ?1; and a die pad including Cu and having a second thermal expansion coefficient that is greater than the first thermal expansion coefficient. A thickness of the nitride semiconductor chip is at least 0.2 mm, length L of the nitride semiconductor chip is at least 3.12 mm, and thickness tm of the die pad and length L of the nitride semiconductor chip satisfy tm ?2.00×10?3×L2+0.173, tm being a thickness in mm and L being a length in mm.

Abstract: A semiconductor device that is a surface mount-type device includes a nitride semiconductor chip including a silicon substrate having a first thermal expansion coefficient and an InxGayAl1-x-yN layer in contact with a surface of the silicon substrate, where 0?x?1, 0?y?1, 0?x+y?1; and a die pad including Cu and having a second thermal expansion coefficient that is greater than the first thermal expansion coefficient. A thickness of the nitride semiconductor chip is at least 0.2 mm, length L of the nitride semiconductor chip is at least 3.12 mm, and thickness tm of the die pad and length L of the nitride semiconductor chip satisfy tm?2.00×10?3×L2+0.173, tm being a thickness in mm and L being a length in mm.

Abstract: Provided that a process for manufacturing an elastic roller having a mandrel and a coating film. The process comprise a first step of forming a coating film on an outer peripheral surface of a first mandrel, and a second step of forming a coating film on an outer peripheral surface of a second mandrel. The process further comprises a cleaning step between the steps. The cleaning step comprising: making a cleaning member arranged coaxially with the central axis of a circular coating head, in a downstream side in a moving direction of the first mandrel with respect to the circular coating head, making the cleaning member relatively approach the circular coating head; bringing a surface to be cleaned into contact with the cleaning member; rotating the cleaning member while the surface comes in contact with the cleaning member; and inserting the cleaning member into the center hole.

Abstract: Provided that a process for manufacturing an elastic roller having a mandrel and a coating film. The process comprise a first step of forming a coating film on an outer peripheral surface of a first mandrel, and a second step of forming a coating film on an outer peripheral surface of a second mandrel. The process further comprises a cleaning step between the steps. The cleaning step comprising: making a cleaning member arranged coaxially with the central axis of a circular coating head, in a downstream side in a moving direction of the first mandrel with respect to the circular coating head, making the cleaning member relatively approach the circular coating head; bringing a surface to be cleaned into contact with the cleaning member; rotating the cleaning member while the surface comes in contact with the cleaning member; and inserting the cleaning member into the center hole.

Abstract: A semiconductor device includes a substrate serving as a base and having a surface on which electrodes are provided, a semiconductor chip mounted to the surface of the substrate, a sealing portion sealing the semiconductor chip and the surface of the substrate, first vias each penetrating the sealing portion in a thickness direction of the sealing portion to reach the electrodes on the surface of the substrate, external terminals connected to the first vias, and second vias provided near the semiconductor chip, extending to such a depth that the second vias do not penetrate the sealing portion, and insulated from the substrate and the semiconductor chip.

Abstract: A semiconductor device includes a substrate serving as a base and having a surface on which electrodes are provided, a semiconductor chip mounted to the surface of the substrate, a sealing portion sealing the semiconductor chip and the surface of the substrate, first vias each penetrating the sealing portion in a thickness direction of the sealing portion to reach the electrodes on the surface of the substrate, external terminals connected to the first vias, and second vias provided near the semiconductor chip, extending to such a depth that the second vias do not penetrate the sealing portion, and insulated from the substrate and the semiconductor chip.

Abstract: A heat generating component (3) is mounted on one surface of a circuit board (2). A heat release member (4) is disposed between the one surface and an opposite wall (12) of a housing (1). The heat release member (4) has a plate (41) that extends in a specified direction and is in contact with the heat generating component (3), and fins (42) that project from the plate (41) toward the opposite wall (12). In a region of the opposite wall (12) of the housing overlapping with the heat release member (4), an air inlet (1c) is provided so as to extend in the specified direction. The heat release member (4) is, at both end portions thereof in the specified direction, in contact with the opposite wall (12) via heat-conductive spacers (9), and a gap (8) is formed between the fins (42) and the opposite wall (12).

Abstract: A heat generating component (3) is mounted on one surface of a circuit board (2). A heat release member (4) is disposed between the one surface and an opposite wall (12) of a housing (1). The heat release member (4) has a plate (41) that extends in a specified direction and is in contact with the heat generating component (3), and fins (42) that project from the plate (41) toward the opposite wall (12). In a region of the opposite wall (12) of the housing overlapping with the heat release member (4), an air inlet (1c) is provided so as to extend in the specified direction. The heat release member (4) is, at both end portions thereof in the specified direction, in contact with the opposite wall (12) via heat-conductive spacers (9), and a gap (8) is formed between the fins (42) and the opposite wall (12).

Abstract: A semiconductor device includes a semiconductor element 1, a thermal conductor 91 located opposite a major surface of the semiconductor element 1, and a mold resin member 6 molding the semiconductor element 1 and at least a part of the thermal conductor 91, wherein at least a part of a top surface of the thermal conductor 91 has an exposed portion exposed from the mold resin member 6, the exposed portion of the thermal conductor 91 has an opening 11, and a periphery of the opening 11 forms a projecting portion 91b projecting toward an opposite side of the semiconductor element 1.

Abstract: A semiconductor device has a wiring substrate provided with an external connecting terminal on a lower surface, a semiconductor chip mounted onto an upper surface of the wiring substrate, a cap-shaped heat dissipation member arranged on the upper surface of the wiring substrate so as to cover the semiconductor chip, a fixing pin for fixing the heat dissipation member onto the upper surface of the wiring substrate, and a heat transfer material sandwiched between a lower surface of the heat dissipation member just above the semiconductor chip and the upper surface of the semiconductor chip.

Abstract: A semiconductor device includes a semiconductor element 1, a thermal conductor 91 located opposite a major surface of the semiconductor element 1, and a mold resin member 6 molding the semiconductor element 1 and at least a part of the thermal conductor 91, wherein at least a part of a top surface of the thermal conductor 91 has an exposed portion exposed from the mold resin member 6, the exposed portion of the thermal conductor 91 has an opening 11, and a periphery of the opening 11 forms a projecting portion 91b projecting toward an opposite side of the semiconductor element 1.

Abstract: The present invention is related to a component and material traceability control apparatus for controlling manufacturing lot identification information of any of a component and material constituting a product manufactured according to a process where a manufacturing apparatus with not less than one component and material reserve unit picks up a needed amount out of the component and material reserved in the component and material reserve unit and manufactures the product, and the component and material traceability control apparatus is equipped with at least a processing unit, a memory unit used as a work area by the processing unit, a manufacturing performance information memory unit, a component and material supply performance information memory unit, and a manufacturing lot trace information memory unit.

Abstract: The present invention is related to a component and material traceability control apparatus for controlling manufacturing lot identification information of any of a component and material constituting a product manufactured according to a process where a manufacturing apparatus with not less than one component and material reserve unit picks up a needed amount out of the component and material reserved in the component and material reserve unit and manufactures the product, and the component and material traceability control apparatus is equipped with at least a processing unit, a memory unit used as a work area by the processing unit, a manufacturing performance information memory unit, a component and material supply performance information memory unit, and a manufacturing lot trace information memory unit.

Abstract: The present invention is related to a component and material traceability control apparatus for controlling manufacturing lot identification information of any of a component and material constituting a product manufactured according to a process where a manufacturing apparatus with not less than one component and material reserve unit picks up a needed amount out of the component and material reserved in the component and material reserve unit and manufactures the product, and the component and material traceability control apparatus is equipped with at least a processing unit, a memory unit used as a work area by the processing unit, a manufacturing performance information memory unit, a component and material supply performance information memory unit, and a manufacturing lot trace information memory unit.

Abstract: The present invention is related to a component and material traceability control apparatus for controlling manufacturing lot identification information of any of a component and material constituting a product manufactured according to a process where a manufacturing apparatus with not less than one component and material reserve unit picks up a needed amount out of the component and material reserved in the component and material reserve unit and manufactures the product, and the component and material traceability control apparatus is equipped with at least a processing unit, a memory unit used as a work area by the processing unit, a manufacturing performance information memory unit, a component and material supply performance information memory unit, and a manufacturing lot trace information memory unit.

Abstract: A time slot selecting method applied to a time division switch in a time division switching network having multi-stage tandem connected time division switches. A controller associated with an upstream time division switch selects an outgoing idle time slot for multi-slot information in accordance with a predetermined time slot selecting order in a manner that the number of combinations of time slots selectable by a downstream time division switch becomes large. Thus, the range of selecting time slots by a downstream time division switch becomes broadened while ensuring the sequence integrity of multi-slots in a frame and hence a path blocking rate is reduced.