Patents by Inventor Katsumi Suemitsu

Katsumi Suemitsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210389395
    Abstract: A magnetoresistive element of the present disclosure includes a multilayer structure made up of at least a fixed magnetization layer, an intermediate layer and a storage layer. A first side wall is formed on a side wall of the multilayer structure. A second side wall is formed on the first side wall. The first side wall is made of an insulating material, for instance SiN or AlOx, that prevents intrusion of hydrogen. The second side wall is made of a hydrogen storage material, for instance titanium.
    Type: Application
    Filed: October 30, 2019
    Publication date: December 16, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Katsumi SUEMITSU, Makoto UEKI, Masashige MORITOKI
  • Publication number: 20210318395
    Abstract: A magnetoresistive element of the present disclosure has at least a layered structure composed of a magnetization fixed layer, an intermediate layer and a storage layer, wherein a metal layer is formed on or above the layered structure; an orthogonal projection image of the layered structure with respect to the metal layer is contained in the metal layer; and assuming that an oxide formation Gibbs energy of a metal atom constituting the metal layer at a temperature T (° C.) of 0° C. or higher and 400° C. or lower is EGib-0(T), a minimum Gibbs energy among oxide formation Gibbs energies of metal atoms constituting the magnetization fixed layer and the storage layer at the temperature T is EGib-1(T), and a maximum Gibbs energy among oxide formation Gibbs energies of metal atoms constituting the intermediate layer at the temperature T is EGib-2(T), EGib-0(T)<EGib-1(T) and/or EGib-2(T)?EGib-0(T) is satisfied.
    Type: Application
    Filed: October 29, 2019
    Publication date: October 14, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Makoto UEKI, Katsumi SUEMITSU
  • Publication number: 20210273002
    Abstract: There is provided a semiconductor device having a configuration suitable for higher integration. The semiconductor device includes: a first substrate having a first front surface; and a second substrate having a second front surface joined to the first front surface. The first substrate includes a first wiring layer including a first wiring line, and a first semiconductor layer that are stacked in order from a position close to the second substrate, and the second substrate includes a storage element layer including a storage element, and a second semiconductor layer that are stacked in order from a position close to the first substrate.
    Type: Application
    Filed: July 24, 2019
    Publication date: September 2, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kan SHIMIZU, Katsumi SUEMITSU
  • Patent number: 10170689
    Abstract: The present invention provides a magnetoresistive effect element which performs writing by a novel method. In a state in which a current does not flow in a magnetization free layer MFR, the magnetization free layer MFR has a magnetic wall MW1 on the side of a magnetization fixed layer MFX1. A magnetic wall MW2 is moved to the magnetic wall MW1 side by causing current to flow from the formed side of the magnetic wall MW1. Thus, an electrical resistance RMTJ between a reference layer REF and the magnetization free layer MFR changes from a low state to a high state.
    Type: Grant
    Filed: January 7, 2015
    Date of Patent: January 1, 2019
    Assignee: Renesas Electronics Corporation
    Inventors: Hironobu Tanigawa, Tetsuhiro Suzuki, Katsumi Suemitsu, Takuya Kitamura, Eiji Kariyada
  • Patent number: 9653677
    Abstract: The present invention makes it possible to inhibit an MR ratio from decreasing by high-temperature heat treatment in a magnetoresistive effect element using a perpendicular magnetization film. The magnetoresistive effect element includes a data storage layer, a data reference layer, and an MgO film interposed between the data storage layer and the data reference layer. The data storage layer includes a CoFeB film coming into contact with the MgO film, a perpendicular magnetization film, and a Ta film interposed between the CoFeB film and the perpendicular magnetization film. The CoFeB film is magnetically coupled to the perpendicular magnetization film through the Ta film.
    Type: Grant
    Filed: January 17, 2013
    Date of Patent: May 16, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Eiji Kariyada, Katsumi Suemitsu
  • Patent number: 9337419
    Abstract: A method of manufacturing a magnetic memory cell, includes forming a tunnel barrier layer over a first magnetic layer, forming a second magnetic layer over the tunnel barrier layer, forming a mask over the second magnetic layer, etching an unmasked part of the second magnetic layer to an intermediate position of the second magnetic layer in a thickness direction of the second magnetic layer, and forming a metallic oxide layer by oxidizing an unetched part of the unmasked part of the second magnetic layer.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: May 10, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Eiji Kariyada, Katsumi Suemitsu
  • Publication number: 20150263276
    Abstract: A method of manufacturing a magnetic memory cell, includes forming a tunnel barrier layer over a first magnetic layer, forming a second magnetic layer over the tunnel barrier layer, forming a mask over the second magnetic layer, etching an unmasked part of the second magnetic layer to an intermediate position of the second magnetic layer in a thickness direction of the second magnetic layer, and forming a metallic oxide layer by oxidizing an unetched part of the unmasked part of the second magnetic layer.
    Type: Application
    Filed: May 28, 2015
    Publication date: September 17, 2015
    Inventors: Eiji KARIYADA, Katsumi SUEMITSU
  • Publication number: 20150207063
    Abstract: The present invention provides a magnetoresistive effect element which performs writing by a novel method. In a state in which a current does not flow in a magnetization free layer MFR, the magnetization free layer MFR has a magnetic wall MW1 on the side of a magnetization fixed layer MFX1. A magnetic wall MW2 is moved to the magnetic wall MW1 side by causing current to flow from the formed side of the magnetic wall MW1. Thus, an electrical resistance RMTJ between a reference layer REF and the magnetization free layer MFR changes from a low state to a high state.
    Type: Application
    Filed: January 7, 2015
    Publication date: July 23, 2015
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Hironobu TANIGAWA, Tetsuhiro SUZUKI, Katsumi SUEMITSU, Takuya KITAMURA, Eiji KARIYADA
  • Patent number: 9065041
    Abstract: The present invention suppresses short circuits of a magnetic memory cell and a deterioration of the characteristics of a magnetic layer. A magnetic memory cell includes: a data storage layer; a tunnel barrier layer formed on the data storage layer; a reference layer formed on the tunnel barrier layer so as to cover a part of the tunnel barrier layer; and a metallic oxide layer formed on the tunnel barrier layer without covering the reference layer. The metallic oxide layer contains an oxide of a material of a contact part of the reference layer with the tunnel barrier layer.
    Type: Grant
    Filed: January 28, 2013
    Date of Patent: June 23, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Eiji Kariyada, Katsumi Suemitsu
  • Publication number: 20140346518
    Abstract: A magnetic memory includes a magnetic memory, including a ferromagnetic underlayer including a magnetic material, a non-magnetic intermediate layer disposed on the underlayer, a ferromagnetic data recording layer formed on the intermediate layer and having a perpendicular magnetic anisotropy, a reference layer connected to the data recording layer across a non-magnetic layer, and first and second magnetization fixed layers disposed in contact with a bottom face of the underlayer. The data recording layer includes a magnetization free region having a reversible magnetization and opposed to the reference layer, a first magnetization fixed region coupled to a first border of the magnetization free layer and having a magnetization fixed in a first direction, and a second magnetization fixed region coupled to a second border of the magnetization free layer and having a magnetization fixed in a second direction opposite to the first direction.
    Type: Application
    Filed: August 8, 2014
    Publication date: November 27, 2014
    Inventors: Eiji Kariyada, Katsumi Suemitsu, Hironobu Tanigawa, Kaoru Mori, Tetsuhiro Suzuki, Kiyokazu Nagahara, Yasuaki Ozaki, Norikazu Ohshima
  • Patent number: 8830735
    Abstract: A magnetic memory includes: a magnetization fixed layer having perpendicular magnetic anisotropy, a magnetization direction of the magnetization fixed layer being fixed; an interlayer dielectric; an underlayer formed on upper faces of the magnetization fixed layer and the interlayer dielectric; and a data recording layer formed on an upper face of the underlayer and having perpendicular magnetic anisotropy. The underlayer includes: a first magnetic underlayer; and a non-magnetic underlayer formed on the first magnetic underlayer. The first magnetic underlayer is formed with such a thickness that the first magnetic underlayer does not exhibit in-plane magnetic anisotropy in a portion of the first magnetic underlayer formed on the interlayer dielectric.
    Type: Grant
    Filed: November 23, 2011
    Date of Patent: September 9, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Eiji Kariyada, Katsumi Suemitsu, Hironobu Tanigawa, Kaoru Mori, Tetsuhiro Suzuki, Kiyokazu Nagahara, Yasuaki Ozaki, Norikazu Ohshima
  • Patent number: 8729648
    Abstract: A magnetic body device has a stacked structure comprising an underlying layer, a magnetic body layer, and a cap layer. The material for the underlying layer is different from that for the cap layer. The magnetic body layer has a free magnetization region having perpendicular magnetic anisotropy and a first characteristic change region and a second characteristic change region situated on both sides of the free magnetization region in a first in-plane direction. The perpendicular magnetic anisotropy of the first characteristic change region and the second characteristic change region is at a level lower than that of the free magnetization region. An external magnetic field containing a component in the first in-plane direction is applied to the free magnetization region. Further, a current in the first in-plane direction is supplied to the free magnetization region.
    Type: Grant
    Filed: April 16, 2013
    Date of Patent: May 20, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Tetsuhiro Suzuki, Katsumi Suemitsu, Eiji Kariyada
  • Patent number: 8716820
    Abstract: A memory includes an underlying layer of a ferromagnetic body, a first nonmagnetic layer on the underlying layer, a data memorizing layer laid on the first nonmagnetic layer and made of a ferromagnetic body having perpendicular magnetic anisotropy, a reference layer coupled through a second nonmagnetic layer with the data memorizing layer, and first and second magnetization fixed layers laid underneath the underlying layer to come into contact with the underlying layer. The data memorizing layer includes a magnetization liberalized region having reversible magnetization, and overlapping with the reference layer, a first magnetization fixed region coupled with an end of the magnetization liberalized region, and having a magnetization direction fixed to +z direction by the first magnetization fixed layer, and a second magnetization fixed region coupled with a different end of the magnetization liberalized region, and having a magnetization direction fixed to ?z direction by the second magnetization fixed layer.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: May 6, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Katsumi Suemitsu, Eiji Kariyada
  • Publication number: 20130285176
    Abstract: A magnetic body device has a stacked structure comprising an underlying layer, a magnetic body layer, and a cap layer. The material for the underlying layer is different from that for the cap layer. The magnetic body layer has a free magnetization region having perpendicular magnetic anisotropy and a first characteristic change region and a second characteristic change region situated on both sides of the free magnetization region in a first in-plane direction. The perpendicular magnetic anisotropy of the first characteristic change region and the second characteristic change region is at a level lower than that of the free magnetization region. An external magnetic field containing a component in the first in-plane direction is applied to the free magnetization region. Further, a current in the first in-plane direction is supplied to the free magnetization region.
    Type: Application
    Filed: April 16, 2013
    Publication date: October 31, 2013
    Applicant: Renesas Electronics Corporation
    Inventors: Tetsuhiro SUZUKI, Katsumi SUEMITSU, Eiji KARIYADA
  • Publication number: 20130234268
    Abstract: The present invention suppresses short circuits of a magnetic memory cell and a deterioration of the characteristics of a magnetic layer. A magnetic memory cell includes: a data storage layer; a tunnel barrier layer formed on the data storage layer; a reference layer formed on the tunnel barrier layer so as to cover a part of the tunnel barrier layer; and a metallic oxide layer formed on the tunnel barrier layer without covering the reference layer. The metallic oxide layer contains an oxide of a material of a contact part of the reference layer with the tunnel barrier layer.
    Type: Application
    Filed: January 28, 2013
    Publication date: September 12, 2013
    Applicant: Renesas Electronics Corporation
    Inventors: Eiji KARIYADA, Katsumi Suemitsu
  • Publication number: 20130075846
    Abstract: A memory includes an underlying layer of a ferromagnetic body, a first nonmagnetic layer on the underlying layer, a data memorizing layer laid on the first nonmagnetic layer and made of a ferromagnetic body having perpendicular magnetic anisotropy, a reference layer coupled through a second nonmagnetic layer with the data memorizing layer, and first and second magnetization fixed layers laid underneath the underlying layer to come into contact with the underlying layer. The data memorizing layer includes a magnetization liberalized region having reversible magnetization, and overlapping with the reference layer, a first magnetization fixed region coupled with an end of the magnetization liberalized region, and having a magnetization direction fixed to +z direction by the first magnetization fixed layer, and a second magnetization fixed region coupled with a different end of the magnetization liberalized region, and having a magnetization direction fixed to ?z direction by the second magnetization fixed layer.
    Type: Application
    Filed: September 10, 2012
    Publication date: March 28, 2013
    Inventors: Katsumi SUEMITSU, Eiji Kariyada
  • Publication number: 20120199470
    Abstract: A method for manufacturing an MTJ film includes forming a first ferromagnetic layer; forming a tunnel barrier layer over the first ferromagnetic layer; and forming a second ferromagnetic layer over the tunnel barrier layer. The first ferromagnetic layer is a Co/Ni stacked film having perpendicular magnetic anisotropy. The step for forming a tunnel barrier layer includes repeating unit film formation treatment n times (n is an integer of 2 or more). The unit film formation treatment includes the steps of: depositing an Mg film by a sputtering method; and oxidizing the deposited Mg film. A film thickness of the deposited Mg film in the first unit film formation treatment is 0.3 nm or more and 0.5 nm or less. A film thickness of the deposited Mg film in the second unit film formation treatment or later is 0.1 nm or more and 0.45 nm or less.
    Type: Application
    Filed: February 2, 2012
    Publication date: August 9, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Kaoru MORI, Eiji KARIYADA, Katsumi SUEMITSU, Norikazu OHSHIMA
  • Publication number: 20120135275
    Abstract: A magnetic memory includes: a magnetization fixed layer having perpendicular magnetic anisotropy, a magnetization direction of the magnetization fixed layer being fixed; an interlayer dielectric; an underlayer formed on upper faces of the magnetization fixed layer and the interlayer dielectric; and a data recording layer formed on an upper face of the underlayer and having perpendicular magnetic anisotropy. The underlayer includes: a first magnetic underlayer; and a non-magnetic underlayer formed on the first magnetic underlayer. The first magnetic underlayer is formed with such a thickness that the first magnetic underlayer does not exhibit in-plane magnetic anisotropy in a portion of the first magnetic underlayer formed on the interlayer dielectric.
    Type: Application
    Filed: November 23, 2011
    Publication date: May 31, 2012
    Applicant: Renesas Electronics Corporation
    Inventors: Eiji Kariyada, Katsumi Suemitsu, Hironobu Tanigawa, Kaoru Mori, Tetsuhiro Suzuki, Kiyokazu Nagahara, Yasuaki Ozaki, Norikazu Ohshima
  • Patent number: 7582923
    Abstract: The present invention to provide a new technique to reduce a variation in switching field of a magnetization free layer in a magnetic memory. The magnetic memory according to the present invention includes a magnetization free layer including a ferromagnetic layer having a shape magnetic anisotropy in a first direction and a magnetic strain constant is positive; and a stress inducing structure configured to apply a tensile stress to said magnetization free layer in a same direction as the first direction.
    Type: Grant
    Filed: November 16, 2005
    Date of Patent: September 1, 2009
    Assignee: NEC Corporation
    Inventors: Yoshiyuki Fukumoto, Tetsuhiro Suzuki, Katsumi Suemitsu
  • Publication number: 20080164502
    Abstract: The present invention to provide a new technique to reduce a variation in switching field of a magnetization free layer in a magnetic memory. The magnetic memory according to the present invention includes a magnetization free layer including a ferromagnetic layer having a shape magnetic anisotropy in a first direction and a magnetic strain constant is positive; and a stress inducing structure configured to apply a tensile stress to said magnetization free layer in a same direction as the first direction.
    Type: Application
    Filed: November 16, 2005
    Publication date: July 10, 2008
    Applicant: NEC CORPORATION
    Inventors: Yoshiyuki Fukumoto, Tetsuhiro Suzuki, Katsumi Suemitsu