Abstract: Display data read out from a picture display memory region within a UMA memory is written in a FIFO, and display data is transferred from the FIFO at a timing required by a liquid crystal panel, wherein a timing of reading out display data from the UMA region and a timing of transferring display data to the liquid crystal panel are made asynchronous to each other. Also, upon detection of writing in a display data region, display data for one picture frame is transferred to the liquid crystal panel, whereby the reduction in the bandwidth for CPU's memory accesses to the UMA is prevented, and the reduction in the overall power consumption of the display system is realized.

Abstract: A mobile phone 10 in accordance with the present invention includes a host CPU 11, a display engine 12 and a liquid crystal display device 13. Also, the display engine 12 is equipped with a host interface 14, a command interrupt logic circuit 15, a data processing section 16 and a liquid crystal drive apparatus 17. Upon reception of video images or the like, the host CPU 11 is connected to the data processing section 16, and upon completion of reception of video images, the host CPU 11 is connected to the liquid crystal drive apparatus 17 such that higher level functions can be added while maintaining the conventional host interface.

Abstract: An interface circuit is provided that shortens the time for which the first CPU cannot use the bus, and minimizes the load on the second CPU. The circuit is equipped with an SRAM that is capable of storing data for one page of the data stored in an SDRAM, and a control section that, upon receiving from a host CPU a page number specifying one of the pages in the SDRAM, transfers to the SRAM data in a page corresponding to the page number; upon receiving from the host CPU a read access request to the data in the SRAM, reads the data requested by the host CPU from the SRAM and transmits the data to the host CPU; and upon receiving from the host CPU a write access request to the data in the SRAM, receives the data transferred by the host CPU and writes the data in the SRAM.

Abstract: To provide an electronic apparatus and electronic apparatus manufacturing method enabling selection of a necessary functional block from among multiple functional blocks or units so that numerous functions can be selectively used with few input/output terminals. An electronic apparatus has input/output terminals 101 for connecting to an external circuit; functional blocks or units 101a to 102c such as DRAM, flash ROM, and an ASIC; a switching circuit 103 that is a two-way analog switch for switching between the functional blocks or units 102a to 102c and input/output terminals 101; and function selection terminals 104 for applying to the switching circuit 103 a signal indicating which functional block of functional blocks or units 102a to 102c to connect to the input/output terminals 101.

Abstract: A semiconductor memory is used to retain execution code and data for a CPU and display data for a liquid crystal controller, also used as a temporary work memory to be used when moving picture data such as MPEG is subject to a decoding process, and also used to retain decoded moving picture data.

Abstract: Display data read out from a picture display memory region within a UMA memory is written in a FIFO, and display data is transferred from the FIFO at a timing required by a liquid crystal panel, wherein a timing of reading out display data from the UMA region and a timing of transferring display data to the liquid crystal panel are made asynchronous to each other. Also, upon detection of writing in a display data region, display data for one picture frame is transferred to the liquid crystal panel, whereby the reduction in the bandwidth for CPU's memory accesses to the UMA is prevented, and the reduction in the overall power consumption of the display system is realized.

Abstract: To provide an electronic apparatus and electronic apparatus manufacturing method enabling selection of a necessary functional block from among multiple functional blocks or units so that numerous functions can be selectively used with few input/output terminals. An electronic apparatus has input/output terminals 101 for connecting to an external circuit; functional blocks or units 101a to 102c such as DRAM, flash ROM, and an ASIC; a switching circuit 103 that is a two-way analog switch for switching between the functional blocks or units 102a to 102c and input/output terminals 101; and function selection terminals 104 for applying to the switching circuit 103 a signal indicating which functional block of functional blocks or units 102a to 102c to connect to the input/output terminals 101.

Abstract: A mobile phone 10 in accordance with the present invention includes a host CPU 11, a display engine 12 and a liquid crystal display device 13. Also, the display engine 12 is equipped with a host interface 14, a command interrupt logic circuit 15, a data processing section 16 and a liquid crystal drive apparatus 17. Upon reception of video images or the like, the host CPU 11 is connected to the data processing section 16, and upon completion of reception of video images, the host CPU 11 is connected to the liquid crystal drive apparatus 17 such that higher level functions can be added while maintaining the conventional host interface.

Abstract: A thin and small computer system that can be used generally for control of equipment or the like, includes a CPU chip, peripheral control chips, and other components mounted in the form of a bare chip, whereby a computer system having a so-called hierarchy architecture can be incorporated in an IC card-like casing. Computer system components are affixedly attached to a double-sided printed wiring board. Electronic components may be attached to the printed wiring board in a bare form and then at least partially sealed with a resin. A system may further include a second printed board which is independent from the first printed board and adhesively attached to a inner surface of the casing and connected to the first printed board by a flexible member. In addition the second circuit board may include structure which enables it to connect to an apparatus for programming an electronic component attached thereto.

Abstract: A thin and small computer system that can be used generally for control of equipment or the like, includes a CPU chip, peripheral control chips, and other components mounted in the form of a bare chip, whereby a computer system having a so-called hierarchy architecture can be incorporated in an IC card-like casing. Computer system components are affixedly attached to a double-sided printed wiring board. Electronic components may be attached to the printed wiring board in a bare form and then at least partially sealed with a resin. A system may further include a second printed board which is independent from the first printed board and adhesively attached to a inner surface of the casing and connected to the first printed board by a flexible member. In addition the second circuit board may include structure which enables it to connect to an apparatus for programming an electronic component attached thereto.

Abstract: A thin and small computer system that can be used generally for control equipment or the like, includes a CPU chip, peripheral control chips, and other components mounted in the form of a bare chip, whereby a computer system having a so-called ISA architecture can be incorporated in an IC card-like casing. Computer system components are fixedly attached to a double-sided printed wiring board. One side of the printed wiring board includes the CPU chip, an IO subsystem chip and memories and the other side includes an image control circuit, memories and the peripheral control chips. A 236-pin connector is formed on a long side of this card-type computer, and is connected to a control bus and an IO bus of the card-type computer. The control bus and the IO bus are not located at opposed positions in the connector. A position of separating the buses from each other is off the center of the connector.

Abstract: A thin and small computer system that can be used generally for control equipment or the like, includes a CPU chip, peripheral control chips, and other components mounted in the form of a bare chip, whereby a computer system having a so-called ISA architecture can be incorporated in an IC card-like casing. A 236-pin connector is formed on a long side of this card-type computer, and is connected to a control bus and an IO bus of the card-type computer. The control bus and the IO bus are not located at opposed positions in the connector. A position of separating the buses from each other is off the center of the connector. Power lines or ground lines are provided at the separating positions in the connector, thus preventing occurrence of unnecessary electromagnetic radiation noise. RAMs are mounted on a sub-PW board, which provides flexibility for the system. A bare chip of an EEPROM is mounted on another printed wiring board, which enables electrical forming to be performed after such mounting.