Patents by Inventor Katsumi Uchikawa

Katsumi Uchikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multilayer printed circuit board and method of making the same
    Patent number: 6531661
    Abstract: A multilayer printed circuit board is provided which includes a base member having a surface provided with a base wiring pattern, an inner buildup layer laminated on the base member and having a surface formed with an inner buildup wiring pattern, and an outer buildup layer laminated on the surface of the inner buildup layer and having a surface formed with an outer buildup wiring pattern. The wiring patterns are electrically connected to each other through vias. The inner buildup layer is formed of a resin material which is not reinforced by glass fibers, whereas the outer buildup layer is formed of a resin material reinforced by glass fibers.
    Type: Grant
    Filed: June 14, 2001
    Date of Patent: March 11, 2003
    Assignee: Fujitsu Limited
    Inventors: Katsumi Uchikawa, Keiji Arai, Kazuhiko Iijima, Naoto Maezawa
  • Multilayer printed circuit board and method of making the same
    Publication number: 20020108776
    Abstract: A multilayer printed circuit board is provided which includes a base member having a surface provided with a base wiring pattern, an inner buildup layer laminated on the base member and having a surface formed with an inner buildup wiring pattern, and an outer buildup layer laminated on the surface of the inner buildup layer and having a surface formed with an outer buildup wiring pattern. The wiring patterns are electrically connected to each other through vias. The inner buildup layer is formed of a resin material which is not reinforced by glass fibers, whereas the outer buildup layer is formed of a resin material reinforced by glass fibers.
    Type: Application
    Filed: June 14, 2001
    Publication date: August 15, 2002
    Applicant: Fujitsu Limited
    Inventors: Katsumi Uchikawa, Keiji Arai, Kazuhiko Iijima, Naoto Maezawa
  • Manufacturing line for multi-layered printed circuit boards
    Patent number: 6021833
    Abstract: A manufacturing line including a plurality of processing sections disposed in a series for manufacturing multi-layered printed circuit boards by continuously conveying and processing boards through the plurality of processing sections, in which the plurality of processing sections have at least two specific processing sections for conducting a common type of processes, and the specific processing sections are disposed in a common area.
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: February 8, 2000
    Assignee: Fujitsu Limited
    Inventors: Katsumi Uchikawa, Keiji Arai, Kouji Takamachi, Tohru Matsui, Ryo Fujita, Tohru Goto, Shigemitsu Matsumoto, Shuntaro Takizawa, Shuji Higuchi, Takanori Kobayashi, Koichi Takemata
  • Method and apparatus for forming resist pattern, and printed wiring board fabricated thereby
    Patent number: 5637426
    Abstract: A method for forming a resist pattern comprising the steps of: placing a transparent mask substrate on an object coated with a resist; drawing a mask pattern directly on the transparent mask substrate with an ink jetter; exposing the resist to light with intervention of the mask pattern; peeling off the mask substrate; and developing the resist, thereby forming a predetermined resist pattern.
    Type: Grant
    Filed: October 12, 1995
    Date of Patent: June 10, 1997
    Assignee: Fujitsu, Ltd.
    Inventor: Katsumi Uchikawa