Patents by Inventor Katsumi Yazawa

Katsumi Yazawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11984260
    Abstract: An electronic device includes a chip component, a conductive terminal, a case, and a fixation part. The chip component includes a terminal electrode on an end surface of the chip component. The conductive terminal is connected to the terminal electrode. The case includes an accommodation recess for accommodating the chip component. The fixation part fixes the case to an installation portion.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: May 14, 2024
    Assignee: TDK CORPORATION
    Inventors: Akihiro Masuda, Shinya Ito, Norihisa Ando, Kosuke Yazawa, Yoshiki Satou, Katsumi Kobayashi, Koji Utsui, Koji Kaneko
  • Patent number: 11961676
    Abstract: An electronic device 10 comprises chip capacitors 20a and 20b, an accommodation recess 62 accommodating the chip capacitors 20a and 20b, and a case 60 including a protrusion 64 partitioning the accommodation recess 62 into a first accommodation space 62a and a second accommodation space 62b along the X-axis direction. The protrusion 64 includes a first protrusion 64a and a second protrusion 64b disposed away from the first protrusion 64a along the Y-axis direction. The first protrusion 64a and the second protrusion 64b are disposed with a communication space 69 provided between the first protrusion 64a and the second protrusion 64b, so that the first accommodation space 62a and the second accommodation space 62b communicate.
    Type: Grant
    Filed: June 23, 2022
    Date of Patent: April 16, 2024
    Assignee: TDK CORPORATION
    Inventors: Akihiro Masuda, Shinya Ito, Norihisa Ando, Kosuke Yazawa, Yoshiki Satou, Katsumi Kobayashi
  • Patent number: 8484643
    Abstract: A method of counting an actual usage time of each CPU in a computer system using a plurality of computers for distributed processing of jobs comprising first counting a CPU usage time used for each job, then counting a processing wait time in memory access of each CPU whenever executing each job, subtracting the processing wait time of each CPU from the CPU usage time for every job, and setting the thus calculated corrected CPU usage time as the actual CPU usage time. A job control system has a means for realizing this method and uses the CPU usage time and the corrected CPU usage time obtained by this means to control the jobs and charge the users.
    Type: Grant
    Filed: March 21, 2005
    Date of Patent: July 9, 2013
    Assignee: Fujitsu Limited
    Inventors: Susumu Takatsu, Katsumi Yazawa, Naoki Sueyasu, Masayuki Kogure, Satoki Shibayama
  • Publication number: 20050166204
    Abstract: A method of counting an actual usage time of each CPU in a computer system using a plurality of computers for distributed processing of jobs comprising first counting a CPU usage time used for each job, then counting a processing wait time in memory access of each CPU whenever executing each job, subtracting the processing wait time of each CPU from the CPU usage time for every job, and setting the thus calculated corrected CPU usage time as the actual CPU usage time. A job control system has a means for realizing this method and uses the CPU usage time and the corrected CPU usage time obtained by this means to control the jobs and charge the users.
    Type: Application
    Filed: March 21, 2005
    Publication date: July 28, 2005
    Applicant: FUJITSU LIMITED
    Inventors: Susumu Takatsu, Katsumi Yazawa, Naoki Sueyasu, Masayuki Kogure, Satoki Shibayama