Patents by Inventor Katsunobu Sasanuma

Katsunobu Sasanuma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6252894
    Abstract: A semiconductor laser is formed of gallium nitride series compound semiconductor and has a double hetero structure including an MQW (multiple quantum well) active layer held between p-type and n-type AlGaN clad layers. The double hetero structure is held between p-type and n-type contact layers. An InGaN optical absorption layer having an optical absorption coefficient larger than the clad layer which has the same conductivity type as the contact layer and is formed adjacent to the contact layer is formed in at least one of the contact layers and an InAlGaN optical guided mode control layer (layer of small refractive index) having an refractive index smaller than the clad layer is formed on the exterior of the optical absorption layer.
    Type: Grant
    Filed: March 5, 1999
    Date of Patent: June 26, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsunobu Sasanuma, Shinji Saito, Genichi Hatakoshi, Kazuhiko Itaya, Masaaki Onomura, Risa Sugiura, Mikio Nakasuji, Hidetoshi Fujimoto, Masahiro Yamamoto, Shinya Nunoue
  • Patent number: 6064079
    Abstract: Disclosed is a gallium nitride-based compound semiconductor device, including a laminate film consisting of a plurality of layers stacked one upon the other to form a pn-junction and formed of InGaAlN. The semiconductor device also includes an n-side electrode and a p-side electrode to supply current to the pn-junction. Further included is a heat generation structure formed within the laminate film. The heat generation structure includes a low resistivity portion having a relatively low resistivity and a high resistivity portion having a relatively high resistivity and positioned adjacent to the low resistivity portion. The low resistivity portion and the high resistivity portion are formed within a single layer, differ from each other in carrier concentration, and formed by introducing an impurity into the single layer in a different dose such that the low resistivity portion is positioned closer to the p-side electrode than the high resistivity portion.
    Type: Grant
    Filed: July 14, 1998
    Date of Patent: May 16, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiro Yamamoto, Shinya Nunoue, Katsunobu Sasanuma, Masayuki Ishikawa