Patents by Inventor Katsunori Hiramatsu

Katsunori Hiramatsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11798968
    Abstract: The present technology relates to an image pickup device and electronic apparatus that enables suppression of dark current. There are included: a photoelectric conversion unit configured to perform a photoelectric conversion; a trench engraved in a semiconductor substrate; a negative fixed charge film having an oxide film, a nitrogen film, and an oxide film on a side wall of the trench; and an electrode film formed in the fixed charge film. The oxide film configuring the fixed charge film includes silicon monoxide (SiO), and the nitrogen film includes silicon nitride (SiN). The nitrogen film configuring the fixed charge film can also include a polysilicon film or a high dielectric constant film (high-k film). The present technology can be applied to, for example, a back-illuminated CMOS image sensor.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: October 24, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Katsunori Hiramatsu
  • Patent number: 11710753
    Abstract: A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.
    Type: Grant
    Filed: February 3, 2022
    Date of Patent: July 25, 2023
    Assignee: Sony Group Corporation
    Inventors: Atsushi Kawashima, Katsunori Hiramatsu, Yasufumi Miyoshi
  • Publication number: 20220238590
    Abstract: An imaging device according to embodiments of the present disclosure includes: a first semiconductor substrate provided with a photoelectric conversion element, floating diffusion that temporarily holds a charge output from the photoelectric conversion element, and a transfer transistor that transfers the charge output from the photoelectric conversion element to the floating diffusion; and a second semiconductor substrate provided on the first semiconductor substrate via a first interlayer insulating film and provided with a readout circuit unit that reads out the charge held in the floating diffusion and outputs a pixel signal.
    Type: Application
    Filed: June 17, 2020
    Publication date: July 28, 2022
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Katsunori HIRAMATSU, Shintaro OKAMOTO, Yoshiaki KITANO, Yuya MAEDA, Shinya SATO
  • Publication number: 20220165767
    Abstract: An imaging device according to an embodiment of the present disclosure includes: a first substrate including, in a first semiconductor substrate, a sensor pixel that performs photoelectric conversion; a second substrate including, in a second semiconductor substrate, a readout circuit that outputs a pixel signal based on electric charges outputted from the sensor pixel, the second substrate being stacked on the first substrate; a first insulating layer provided between the first semiconductor substrate and the second semiconductor substrate; and a second insulating layer provided between the first semiconductor substrate and the second semiconductor substrate, and having lower film density than the first insulating layer.
    Type: Application
    Filed: February 13, 2020
    Publication date: May 26, 2022
    Inventors: NOBUTOSHI FUJII, KATSUNORI HIRAMATSU, KEIICHI NAKAZAWA
  • Publication number: 20220157870
    Abstract: A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.
    Type: Application
    Filed: February 3, 2022
    Publication date: May 19, 2022
    Applicant: Sony Group Corporation
    Inventors: Atsushi Kawashima, Katsunori Hiramatsu, Yasufumi Miyoshi
  • Patent number: 11282881
    Abstract: A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.
    Type: Grant
    Filed: February 5, 2020
    Date of Patent: March 22, 2022
    Assignee: Sony Corporation
    Inventors: Atsushi Kawashima, Katsunori Hiramatsu, Yasufumi Miyoshi
  • Publication number: 20210343774
    Abstract: Provided is a solid-state imaging device capable of further improving reliability of a solid-state imaging device and further reducing manufacturing cost. Provided is a solid-state imaging device including a second semiconductor substrate provided with a photoelectric conversion unit and a second element, a second insulating layer, a first semiconductor substrate provided with a first element, and a first insulating layer arranged in this order from a light incident side, and including a groove formed on the first semiconductor substrate, in which the groove has a first side wall and a second side wall, and a part of at least one side wall of the first side wall or the second side wall extends in an oblique direction with respect to a surface of the first semiconductor substrate on the light incident side.
    Type: Application
    Filed: October 15, 2019
    Publication date: November 4, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Katsunori HIRAMATSU
  • Patent number: 11018110
    Abstract: The present technology relates to a semiconductor device, a manufacturing method, and a solid-state imaging device which are capable of suppressing a decrease in bonding strength and preventing a poor electrical connection or peeling when two substrates are bonded to each other. Provided is a semiconductor device, including: a first substrate including a first electrode including a metal; and a second substrate bonded to the first substrate and including a second electrode including a metal. An acute-angled concavo-convex portion is formed on a side surface of a groove in which the first electrode is formed and a side surface of a groove in which the second electrode metal-bonded to the first electrode is formed. The present technology can be, for example, applied to a solid-state imaging device such as a CMOS image sensor.
    Type: Grant
    Filed: October 10, 2017
    Date of Patent: May 25, 2021
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Akiko Hirata, Tadayuki Kimura, Yasufumi Miyoshi, Katsunori Hiramatsu
  • Publication number: 20200350345
    Abstract: The present technology relates to an image pickup device and electronic apparatus that enables suppression of dark current. There are included: a photoelectric conversion unit configured to perform a photoelectric conversion; a trench engraved in a semiconductor substrate; a negative fixed charge film having an oxide film, a nitrogen film, and an oxide film on a side wall of the trench; and an electrode film formed in the fixed charge film, oxide film configuring the fixed charge film includes silicon monoxide (SiO), and the nitrogen film includes silicon nitride (SiN). The nitrogen film configuring the fixed charge film can also include a polysilicon film or a high dielectric constant film (high-k film). The resent technology can be applied to, for example, a back-illuminated CMOS image sensor.
    Type: Application
    Filed: October 26, 2018
    Publication date: November 5, 2020
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Katsunori HIRAMATSU
  • Publication number: 20200176498
    Abstract: A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.
    Type: Application
    Filed: February 5, 2020
    Publication date: June 4, 2020
    Applicant: Sony Corporation
    Inventors: Atsushi Kawashima, Katsunori Hiramatsu, Yasufumi Miyoshi
  • Patent number: 10622563
    Abstract: The present technology relates to a semiconductor device, a solid-state imaging device, an electronic apparatus, and a manufacturing method of the semiconductor device which can suppress generation of residual carriers within an organic film. The semiconductor device includes: a first electrode; a second electrode; and an organic film that is disposed between the first electrode and the second electrode. At least one of the first electrode and the second electrode is discontinuous. The organic film includes an inter-electrode region, which is a region interposed between the first electrode and the second electrode, and a non-inter-electrode region, which is a region not interposed between the first electrode and the second electrode, and the non-inter-electrode region is disposed between the adjacent inter-electrode regions. A suppression region, which is a region in which at least one of generation and movement of a carrier is suppressed, is present within the non-inter-electrode region.
    Type: Grant
    Filed: May 6, 2016
    Date of Patent: April 14, 2020
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Toshihiko Hayashi, Takayoshi Honda, Yuji Uesugi, Katsunori Hiramatsu
  • Patent number: 10600836
    Abstract: A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: March 24, 2020
    Assignee: Sony Corporation
    Inventors: Atsushi Kawashima, Katsunori Hiramatsu, Yasufumi Miyoshi
  • Publication number: 20200035643
    Abstract: The present technology relates to a semiconductor device, a manufacturing method, and a solid-state imaging device which are capable of suppressing a decrease in bonding strength and preventing a poor electrical connection or peeling when two substrates are bonded to each other. Provided is a semiconductor device, including: a first substrate including a first electrode including a metal; and a second substrate bonded to the first substrate and including a second electrode including a metal. An acute-angled concavo-convex portion is formed on a side surface of a groove in which the first electrode is formed and a side surface of a groove in which the second electrode metal-bonded to the first electrode is formed. The present technology can be, for example, applied to a solid-state imaging device such as a CMOS image sensor.
    Type: Application
    Filed: October 10, 2017
    Publication date: January 30, 2020
    Inventors: AKIKO HIRATA, TADAYUKI KIMURA, YASUFUMI MIYOSHI, KATSUNORI HIRAMATSU
  • Publication number: 20180269246
    Abstract: A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.
    Type: Application
    Filed: May 22, 2018
    Publication date: September 20, 2018
    Applicant: Sony Corporation
    Inventors: Atsushi Kawashima, Katsunori Hiramatsu, Yasufumi Miyoshi
  • Patent number: 9985064
    Abstract: A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: May 29, 2018
    Assignee: Sony Corporation
    Inventors: Atsushi Kawashima, Katsunori Hiramatsu, Yasufumi Miyoshi
  • Publication number: 20180114909
    Abstract: The present technology relates to a semiconductor device, a solid-state imaging device, an electronic apparatus, and a manufacturing method of the semiconductor device which can suppress generation of residual carriers within an organic film. The semiconductor device includes: a first electrode; a second electrode; and an organic film that is disposed between the first electrode and the second electrode. At least one of the first electrode and the second electrode is discontinuous. The organic film includes an inter-electrode region, which is a region interposed between the first electrode and the second electrode, and a non-inter-electrode region, which is a region not interposed between the first electrode and the second electrode, and the non-inter-electrode region is disposed between the adjacent inter-electrode regions. A suppression region, which is a region in which at least one of generation and movement of a carrier is suppressed, is present within the non-inter-electrode region.
    Type: Application
    Filed: May 6, 2016
    Publication date: April 26, 2018
    Inventors: TOSHIHIKO HAYASHI, TAKAYOSHI HONDA, YUJI UESUGI, KATSUNORI HIRAMATSU
  • Publication number: 20170301714
    Abstract: A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.
    Type: Application
    Filed: June 29, 2017
    Publication date: October 19, 2017
    Applicant: Sony Corporation
    Inventors: Atsushi Kawashima, Katsunori Hiramatsu, Yasufumi Miyoshi
  • Patent number: 9728571
    Abstract: A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: August 8, 2017
    Assignee: Sony Corporation
    Inventors: Atsushi Kawashima, Katsunori Hiramatsu, Yasufumi Miyoshi
  • Publication number: 20170069669
    Abstract: A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.
    Type: Application
    Filed: November 18, 2016
    Publication date: March 9, 2017
    Applicant: Sony Corporation
    Inventors: Atsushi Kawashima, Katsunori Hiramatsu, Yasufumi Miyoshi
  • Patent number: 9536919
    Abstract: A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: January 3, 2017
    Assignee: Sony Corporation
    Inventors: Atsushi Kawashima, Katsunori Hiramatsu, Yasufumi Miyoshi