Patents by Inventor Katsunori Koike

Katsunori Koike has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11953135
    Abstract: A fitting assembly for fluid device is provided, which includes a first port, a second port, a first annular member, a second annular member, and a connector. The first port is annular and installed at a first fluid device to be connected with its first fluid channel. The second port is annular and installed at a second fluid device to be connected with its second fluid channel. The first annular member is installed at the first port and has a first coupler. The second annular member is installed at the second port and has a second coupler to be coupled with the first coupler to fix the second annular member to the first annular member. The connector is installed between the first port and the second port and seals gaps between the connector and the first and second ports.
    Type: Grant
    Filed: June 15, 2018
    Date of Patent: April 9, 2024
    Assignee: NIPPON PILLAR PACKING CO., LTD.
    Inventors: Toshihide Iida, Tatsuya Fujii, Katsunori Sugita, Takahito Konishi, Tomoyuki Koike
  • Publication number: 20230130988
    Abstract: To achieve a brake hydraulic pressure control system which makes it possible to suppress an increase of the manufacturing cost as compared to existing brake hydraulic pressure control systems which ground a control board using a coil spring. A brake hydraulic pressure control system according to the present invention includes: a metallic substrate (80) in which a flow channel for brake fluid is formed; and a control board (76) of a hydraulic pressure control mechanism for the brake fluid provided in the flow channel. The brake hydraulic pressure control system according to the present invention further includes at least one conductive plate spring (90) which is provided between the control board (76) and a component that is electrically connected to the substrate (80).
    Type: Application
    Filed: February 11, 2021
    Publication date: April 27, 2023
    Inventors: Katsunori Koike, Mikiya Kotaka
  • Publication number: 20220055584
    Abstract: The present invention obtains a brake hydraulic pressure control apparatus for a vehicle capable of suppressing an increase in manufacturing cost thereof when being configured to detect a rotation angle of a rotor. The brake hydraulic pressure control apparatus according to the present invention is a brake hydraulic pressure control apparatus for a vehicle that includes: abase body that is formed with a channel of a brake fluid; a motor assembly that includes a rotor and a stator and drives a pump device provided in the channel; a control board of a controller that controls the motor assembly; and a housing that accommodates the control board, and that further includes: a permanent magnet that is attached to the motor assembly and rotates with the rotor; and a detection sensor that detects a magnetic field generated by the permanent magnet.
    Type: Application
    Filed: August 23, 2019
    Publication date: February 24, 2022
    Inventors: Atsushi Yoshida, Katsunori Koike
  • Publication number: 20080309383
    Abstract: A semiconductor integrated circuit includes a memory circuit, an oscillator circuit which generates an internal clock signal, based on control information held in the memory circuit, and a logic circuit which generates control information that causes the frequency of the internal clock signal to coincide with the frequency of an external clock signal. The internal clock signal is used for a synchronous operation of an internal circuit. Even if an error (undesired variation) occurs in the oscillation characteristic of the oscillator circuit due to process variations, it is possible to cause an internal clock signal frequency to coincide with an external clock signal frequency corresponding to a target frequency without the need for external attachment of a crystal oscillator and the input of an external clock signal.
    Type: Application
    Filed: April 21, 2008
    Publication date: December 18, 2008
    Inventors: Naoki Yada, Yasuyuki Saito, Yasushi Shibatsuka, Katsunori Koike, Mitsuhiko Okutsu
  • Patent number: 7382681
    Abstract: A semiconductor integrated circuit includes a memory circuit, an oscillator circuit which generates an internal clock signal, based on control information held in the memory circuit, and a logic circuit which generates control information that causes the frequency of the internal clock signal to coincide with the frequency of an external clock signal. The internal clock signal is used for a synchronous operation of an internal circuit. Even if an error (undesired variation) occurs in the oscillation characteristic of the oscillator circuit due to process variations, it is possible to cause an internal clock signal frequency to coincide with an external clock signal frequency corresponding to a target frequency without the need for external attachment of a crystal oscillator and the input of an external clock signal.
    Type: Grant
    Filed: February 21, 2007
    Date of Patent: June 3, 2008
    Assignees: Renesas Technology Corp., Hitachi Engineering Co., Ltd.
    Inventors: Naoki Yada, Yasuyuki Saito, Yasushi Shibatsuka, Katsunori Koike, Mitsuhiko Okutsu
  • Publication number: 20070159914
    Abstract: A semiconductor integrated circuit includes a memory circuit, an oscillator circuit which generates an internal clock signal, based on control information held in the memory circuit, and a logic circuit which generates control information that causes the frequency of the internal clock signal to coincide with the frequency of an external clock signal. The internal clock signal is used for a synchronous operation of an internal circuit. Even if an error (undesired variation) occurs in the oscillation characteristic of the oscillator circuit due to process variations, it is possible to cause an internal clock signal frequency to coincide with an external clock signal frequency corresponding to a target frequency without the need for external attachment of a crystal oscillator and the input of an external clock signal.
    Type: Application
    Filed: February 21, 2007
    Publication date: July 12, 2007
    Inventors: Naoki Yada, Yasuyuki Saito, Yasushi Shibatsuka, Katsunori Koike, Mitsuhiko Okutsu
  • Patent number: 7196967
    Abstract: A semiconductor integrated circuit includes a memory circuit, an oscillator circuit which generates an internal clock signal, based on control information held in the memory circuit, and a logic circuit which generates control information that causes the frequency of the internal clock signal to coincide with the frequency of an external clock signal. The internal clock signal is used for a synchronous operation of an internal circuit. Even if an error (undesired variation) occurs in the oscillation characteristic of the oscillator circuit due to process variations, it is possible to cause an internal clock signal frequency to coincide with an external clock signal frequency corresponding to a target frequency without the need for external attachment of a crystal oscillator and the input of an external clock signal.
    Type: Grant
    Filed: June 5, 2006
    Date of Patent: March 27, 2007
    Assignees: Renesas Technology Corp., Hitachi Engineering Co., Ltd.
    Inventors: Naoki Yada, Yasuyuki Saito, Yasushi Shibatsuka, Katsunori Koike, Mitsuhiko Okutsu
  • Patent number: 7193929
    Abstract: A semiconductor integrated circuit includes a memory circuit, an oscillator circuit which generates an internal clock signal, based on control information held in the memory circuit, and a logic circuit which generates control information that causes the frequency of the internal clock signal to coincide with the frequency of an external clock signal. The internal clock signal is used for a synchronous operation of an internal circuit. Even if an error (undesired variation) occurs in the oscillation characteristic of the oscillator circuit due to process variations, it is possible to cause an internal clock signal frequency to coincide with an external clock signal frequency corresponding to a target frequency without the need for external attachment of a crystal oscillator and the input of an external clock signal.
    Type: Grant
    Filed: June 5, 2006
    Date of Patent: March 20, 2007
    Assignees: Renesas Technology Corp., Hitachi Engineering Co., Ltd.
    Inventors: Naoki Yada, Yasuyuki Saito, Yasushi Shibatsuka, Katsunori Koike, Mitsuhiko Okutsu
  • Publication number: 20060238216
    Abstract: A semiconductor integrated circuit includes a memory circuit, an oscillator circuit which generates an internal clock signal, based on control information held in the memory circuit, and a logic circuit which generates control information that causes the frequency of the internal clock signal to coincide with the frequency of an external clock signal. The internal clock signal is used for a synchronous operation of an internal circuit. Even if an error (undesired variation) occurs in the oscillation characteristic of the oscillator circuit due to process variations, it is possible to cause an internal clock signal frequency to coincide with an external clock signal frequency corresponding to a target frequency without the need for external attachment of a crystal oscillator and the input of an external clock signal.
    Type: Application
    Filed: June 5, 2006
    Publication date: October 26, 2006
    Inventors: Naoki Yada, Yasuyuki Saito, Yasushi Shibatsuka, Katsunori Koike, Mitsuhiko Okutsu
  • Publication number: 20060227650
    Abstract: A semiconductor integrated circuit includes a memory circuit, an oscillator circuit which generates an internal clock signal, based on control information held in the memory circuit, and a logic circuit which generates control information that causes the frequency of the internal clock signal to coincide with the frequency of an external clock signal. The internal clock signal is used for a synchronous operation of an internal circuit. Even if an error (undesired variation) occurs in the oscillation characteristic of the oscillator circuit due to process variations, it is possible to cause an internal clock signal frequency to coincide with an external clock signal frequency corresponding to a target frequency without the need for external attachment of a crystal oscillator and the input of an external clock signal.
    Type: Application
    Filed: June 5, 2006
    Publication date: October 12, 2006
    Inventors: Naoki Yada, Yasuyuki Saito, Yasushi Shibatsuka, Katsunori Koike, Mitsuhiko Okutsu
  • Patent number: 7061825
    Abstract: A semiconductor integrated circuit includes a memory circuit, an oscillator circuit which generates an internal clock signal, based on control information held in the memory circuit, and a logic circuit which generates control information that causes the frequency of the internal clock signal to coincide with the frequency of an external clock signal. The internal clock signal is used for a synchronous operation of an internal circuit. Even if an error (undesired variation) occurs in the oscillation characteristic of the oscillator circuit due to process variations, it is possible to cause an internal clock signal frequency to coincide with an external clock signal frequency corresponding to a target frequency without the need for external attachment of a crystal oscillator and the input of an external clock signal.
    Type: Grant
    Filed: June 15, 2004
    Date of Patent: June 13, 2006
    Assignees: Renesas Technology Corp., Hitachi Engineering Co., Ltd.
    Inventors: Naoki Yada, Yasuyuki Saito, Yasushi Shibatsuka, Katsunori Koike, Mitsuhiko Okutsu
  • Publication number: 20050047265
    Abstract: A semiconductor integrated circuit includes a memory circuit, an oscillator circuit which generates an internal clock signal, based on control information held in the memory circuit, and a logic circuit which generates control information that causes the frequency of the internal clock signal to coincide with the frequency of an external clock signal. The internal clock signal is used for a synchronous operation of an internal circuit. Even if an error (undesired variation) occurs in the oscillation characteristic of the oscillator circuit due to process variations, it is possible to cause an internal clock signal frequency to coincide with an external clock signal frequency corresponding to a target frequency without the need for external attachment of a crystal oscillator and the input of an external clock signal.
    Type: Application
    Filed: June 15, 2004
    Publication date: March 3, 2005
    Inventors: Naoki Yada, Yasuyuki Saito, Yasushi Shibatsuka, Katsunori Koike, Mitsuhiko Okutsu
  • Patent number: 6657459
    Abstract: A semiconductor integrated circuit device, responsive to an input signal having a low amplitude and short transition time, operates with low power consumption and prevents the flow of breakthrough current. In an example circuit thereof, the input signal is transmitted through an NMOS pass transistor to the gate of a first NMOS transistor and is applied, through a second NMOS transistor, to the gate of a first PMOS transistor, the first PMOS transistor performing complementary operation with the first NMOS transistor through the second NMOS transistor; the gate of the first PMOS transistor is connected to the power supply potential through the second PMOS transistor; the gate of the second NMOS transistor is connected to the power supply potential; and the gate of the second PMOS transistor is controlled by the signal at a common drain connection of the first NMOS and first PMOS transistors.
    Type: Grant
    Filed: May 14, 2002
    Date of Patent: December 2, 2003
    Assignees: Hitachi, Ltd., Hitachi Engineering Co., Ltd.
    Inventors: Yoji Nishio, Kosaku Hirose, Hideo Hara, Katsunori Koike, Kayoko Nemoto, Tatsumi Yamauchi, Fumio Murabayashi, Hiromichi Yamada
  • Patent number: 6462580
    Abstract: The object of the present invention to provide a semiconductor integrated circuit device wherein the input signal is made to have a low amplitude to shorten transition time of the input signal, said integrated circuit device operating at a low power consumption, without flowing of breakthrough current, despite entry of the input signal featuring low-amplitude operations, and said integrated circuit device comprising a gate circuit, memory and processor.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: October 8, 2002
    Assignees: Hitachi, Ltd., Hitachi Engineering Co., Ltd.
    Inventors: Yoji Nishio, Kosaku Hirose, Hideo Hara, Katsunori Koike, Kayoko Nemoto, Tatsumi Yamauchi, Fumio Murabayashi, Hiromichi Yamada
  • Publication number: 20020130683
    Abstract: A semiconductor integrated circuit device, responsive to an input signal having a low amplitude and short transition time, operates with low power consumption and prevents the flow of breakthrough current. In an example circuit thereof, the input signal is transmitted through an NMOS pass transistor to the gate of a first NMOS transistor and is applied, through a second NMOS transistor, to the gate of a first PMOS transistor, the first PMOS transistor performing complementary operation with the first NMOS transistor through the second NMOS transistor; the gate of the first PMOS transistor is connected to the power supply potential through the second PMOS transistor; the gate of the second NMOS transistor is connected to the power supply potential; and the gate of the second PMOS transistor is controlled by the signal at a common drain connection of the first NMOS and first PMOS transistors.
    Type: Application
    Filed: May 14, 2002
    Publication date: September 19, 2002
    Inventors: Yoji Nishio, Kosaku Hirose, Hideo Hara, Katsunori Koike, Kayoko Nemoto, Tatsumi Yamauchi, Fumio Murabayashi, Hiromichi Yamada
  • Publication number: 20010000653
    Abstract: The object of the present invention is to provide a semiconductor integrated circuit device wherein the input signal is made to have a low amplitude to shorten transition time of the input signal, said integrated circuit device operating at a low power consumption, without flowing of breakthrough current, despite entry of the input signal featuring low-amplitude operations, and said integrated circuit device comprising a gate circuit, memory and processor.
    Type: Application
    Filed: December 28, 2000
    Publication date: May 3, 2001
    Inventors: Yoji Nishio, Kosaku Hirose, Hideo Hara, Katsunori Koike, Kayoko Nemoto, Tatsumi Yamauchi, Fumio Murabayashi, Hiromichi Yamada
  • Patent number: 6172532
    Abstract: The object of the present invention is to provide a semiconductor integrated circuit device wherein the input signal is made to have a low amplitude to shorten transition time of the input signal, said integrated circuit device operating at a low power consumption, without flowing of breakthrough current, despite entry of the input signal featuring low-amplitude operations, and said integrated circuit device comprising a gate circuit, memory and processor.
    Type: Grant
    Filed: September 8, 1997
    Date of Patent: January 9, 2001
    Assignees: Hitachi, Ltd., Hitachi Engineering Co., Ltd.
    Inventors: Yoji Nishio, Kosaku Hirose, Hideo Hara, Katsunori Koike, Kayoko Nemoto, Tatsumi Yamauchi, Fumio Murabayashi, Hiromichi Yamada
  • Patent number: 5677641
    Abstract: The object of the present invention is to provide a semiconductor integrated circuit device wherein the input signal is made to have a low amplitude to shorten transition time of the input signal, said integrated circuit device operating at a low power consumption, without flowing of breakthrough current, despite entry of the input signal featuring low-amplitude operations, and said integrated circuit device comprising a gate circuit, memory and processor.
    Type: Grant
    Filed: April 18, 1995
    Date of Patent: October 14, 1997
    Assignees: Hitachi Ltd., Hitachi Engineering Co., Ltd.
    Inventors: Yoji Nishio, Kosaku Hirose, Hideo Hara, Katsunori Koike, Kayoko Nemoto, Tatsumi Yamauchi, Fumio Murabayashi, Hiromichi Yamada