Patents by Inventor Katsunori Makihara

Katsunori Makihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10292530
    Abstract: A heating and cooking apparatus is provided that can produce a place for all-participating-type cooking. The electric griddle 100 mainly includes an iron plate section 110 having a high thermal conductivity, a glass section 120 having a low thermal conductivity, a heating material 130 as a heat source, a heat insulating mechanism 140, and an outer frame 150. On the glass section 120, it is possible to place dishes and bowls on which food ingredients and the like can be placed in the glass part 120, and to place food ingredients there directly. Thus, it is possible to prevent food ingredients and the like from being placed only in the hands of a specific person, to realize a situation which many people can easily cook, and to produce a place for all-participating-type cooking.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: May 21, 2019
    Assignee: A UTILITY TOOL CO., LTD.
    Inventor: Katsunori Makihara
  • Publication number: 20180353008
    Abstract: A heating and cooking apparatus is provided that can produce a place for all-participating-type cooking. The electric griddle 100 mainly includes an iron plate section 110 having a high thermal conductivity, a glass section 120 having a low thermal conductivity, a heating material 130 as a heat source, a heat insulating mechanism 140, and an outer frame 150. On the glass section 120, it is possible to place dishes and bowls on which food ingredients and the like can be placed in the glass part 120, and to place food ingredients there directly. Thus, it is possible to prevent food ingredients and the like from being placed only in the hands of a specific person, to realize a situation which many people can easily cook, and to produce a place for all-participating-type cooking.
    Type: Application
    Filed: May 13, 2016
    Publication date: December 13, 2018
    Applicant: A UTILITY TOOL CO., LTD.
    Inventor: Katsunori MAKIHARA
  • Patent number: 8653518
    Abstract: A semiconductor device has a floating gate structure in which charge storage layers are stacked on a SiO2 layer formed on a substrate made of n-type Si. The charge storage layer has quantum dots made of undoped Si and an oxide layer that covers the quantum dots. The charge storage layer has quantum dots made of n+-Si and an oxide layer that covers the quantum dots. Electrons originally existing in the quantum dots migrate between the quantum dots and the quantum dots via tunnel junction and are distributed in the quantum dots and/or the quantum dots according to the voltage applied to a gate electrode via pads. The distribution is detected in the form of a current (ISD).
    Type: Grant
    Filed: December 6, 2007
    Date of Patent: February 18, 2014
    Assignee: Hiroshima University
    Inventors: Katsunori Makihara, Seiichi Miyazaki, Seiichiro Higashi, Hideki Murakami
  • Patent number: 7898020
    Abstract: A semiconductor memory includes a composite floating structure where an insulation film is formed on a semiconductor substrate, Si-based quantum dots covered with an extremely thin Si oxide film is formed on the insulation film, silicide quantum dots covered with a high dielectric insulation film are formed on the extremely thin Si oxide film, and Si-based quantum dots covered with a high dielectric insulation film are formed on the high dielectric insulation film. Multivalued memory operations can be conducted at a high speed and with stability by applying a certain positive voltage to a gate electrode to accumulate electrons in the silicide quantum dots and by applying a certain negative voltage and weak light to the gate electrode to emit the electrons from the silicide quantum dots.
    Type: Grant
    Filed: December 6, 2007
    Date of Patent: March 1, 2011
    Assignee: Hiroshima University
    Inventors: Katsunori Makihara, Seiichi Miyazaki, Seiichiro Higashi
  • Publication number: 20100308328
    Abstract: A semiconductor device has a floating gate structure in which charge storage layers are stacked on a SiO2 layer formed on a substrate made of n-type Si. The charge storage layer has quantum dots made of undoped Si and an oxide layer that covers the quantum dots. The charge storage layer has quantum dots made of n+-Si and an oxide layer that covers the quantum dots. Electrons originally existing in the quantum dots migrate between the quantum dots and the quantum dots via tunnel junction and are distributed in the quantum dots and/or the quantum dots according to the voltage applied to a gate electrode via pads. The distribution is detected in the form of a current (ISD).
    Type: Application
    Filed: December 6, 2007
    Publication date: December 9, 2010
    Inventors: Katsunori Makihara, Seiichi Miyazaki, Seiichiro Higashi, Hideki Murakami
  • Patent number: 7829935
    Abstract: A semiconductor memory has a composite floating structure in which quantum dots composed of Si and coated with a Si oxide thin film are deposited on an insulating film formed on a semiconductor substrate, quantum dots coated with a high-dielectric insulating film are deposited on the quantum dots, and quantum dots composed of Si and coated with a high-dielectric insulating film are further deposited. Each of the quantum dots includes a core layer and a clad layer which covers the core layer. The electron occupied level in the core layer is lower than that in the clad layer.
    Type: Grant
    Filed: March 26, 2008
    Date of Patent: November 9, 2010
    Assignee: Hiroshima University
    Inventors: Katsunori Makihara, Seiichi Miyazaki, Seiichiro Higashi
  • Patent number: 7812621
    Abstract: A measuring unit applies a dc voltage causing an inversion layer to be formed on an interface between a semiconductor substrate and an insulating film to the semiconductor substrate while changing a change speed of a level of the dc voltage, and measures a current flowing through the insulating film. An arithmetic unit obtains a straight line showing a relationship between the current flowing through the insulating film and the change speed of the dc voltage on the basis of a relationship between the current measured by the measuring unit and the dc voltage, and calculates a slope of the obtained straight line as surface capacitance of the insulating film. The arithmetic unit calculates permittivity of the insulating film on the basis of the calculated surface capacitance, an area of contact between a probe and the insulating film and a thickness of the insulating film.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: October 12, 2010
    Assignee: Hiroshima University
    Inventors: Katsunori Makihara, Seiichi Miyazaki, Seiichiro Higashi
  • Patent number: 7768032
    Abstract: A light-emitting device comprises first and second dot members. The first dot member is formed so that it makes contact with the second dot member. The first dot member comprises a plurality of first quantum dot layers. Each of the plurality of first quantum dot layers comprises a plurality of first quantum dots and a silicon dioxide film. The first quantum dot comprises an n-type silicon dot. The second dot member comprises a plurality of second quantum dot layers. Each of the plurality of second quantum dot layers comprises a plurality of second quantum dots and a silicon dioxide film. The second quantum dot comprises a p-type silicon dot.
    Type: Grant
    Filed: September 17, 2008
    Date of Patent: August 3, 2010
    Assignee: Hiroshima University
    Inventors: Katsunori Makihara, Seiichi Miyazaki, Seiichiro Higashi
  • Publication number: 20100176824
    Abstract: A measuring unit applies a dc voltage causing an inversion layer to be formed on an interface between a semiconductor substrate and an insulating film to the semiconductor substrate while changing a change speed of a level of the dc voltage, and measures a current flowing through the insulating film. An arithmetic unit obtains a straight line showing a relationship between the current flowing through the insulating film and the change speed of the dc voltage on the basis of a relationship between the current measured by the measuring unit and the dc voltage, and calculates a slope of the obtained straight line as surface capacitance of the insulating film. The arithmetic unit calculates permittivity of the insulating film on the basis of the calculated surface capacitance, an area of contact between a probe and the insulating film and a thickness of the insulating film.
    Type: Application
    Filed: July 31, 2008
    Publication date: July 15, 2010
    Inventors: Katsunori Makihara, Seiichi Miyazaki, Seiichiro Higashi
  • Publication number: 20100155808
    Abstract: A semiconductor memory has a composite floating structure in which quantum dots composed of Si and coated with a Si oxide thin film are deposited on an insulating film formed on a semiconductor substrate, quantum dots coated with a high-dielectric insulating film are deposited on the quantum dots, and quantum dots composed of Si and coated with a high-dielectric insulating film are further deposited. Each of the quantum dots includes a core layer and a clad layer which covers the core layer. The electron occupied level in the core layer is lower than that in the clad layer.
    Type: Application
    Filed: March 26, 2008
    Publication date: June 24, 2010
    Inventors: Katsunori Makihara, Seiichi Miyazaki, Seiichiro Higashi
  • Publication number: 20100006921
    Abstract: A semiconductor memory includes a composite floating structure where an insulation film is formed on a semiconductor substrate, Si-based quantum dots covered with an extremely thin Si oxide film is formed on the insulation film, silicide quantum dots covered with a high dielectric insulation film are formed on the extremely thin Si oxide film, and Si-based quantum dots covered with a high dielectric insulation film are formed on the high dielectric insulation film. Multivalued memory operations can be conducted at a high speed and with stability by applying a certain positive voltage to a gate electrode to accumulate electrons in the silicide quantum dots and by applying a certain negative voltage and weak light to the gate electrode to emit the electrons from the silicide quantum dots.
    Type: Application
    Filed: December 6, 2007
    Publication date: January 14, 2010
    Inventors: Katsunori Makihara, Seiichi Miyazaki, Seiichiro Higashi
  • Publication number: 20090236584
    Abstract: A light-emitting device comprises first and second dot members. The first dot member is formed so that it makes contact with the second dot member. The first dot member comprises a plurality of first quantum dot layers. Each of the plurality of first quantum dot layers comprises a plurality of first quantum dots and a silicon dioxide film. The first quantum dot comprises an n-type silicon dot. The second dot member comprises a plurality of second quantum dot layers. Each of the plurality of second quantum dot layers comprises a plurality of second quantum dots and a silicon dioxide film. The second quantum dot comprises a p-type silicon dot.
    Type: Application
    Filed: September 17, 2008
    Publication date: September 24, 2009
    Inventors: Katsunori Makihara, Seiichi Miyazaki, Seiichiro Higashi