Patents by Inventor Katsunori Yanashima
Katsunori Yanashima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11973316Abstract: [Object] To provide a vertical cavity surface emitting laser element and an electronic apparatus that have high light emission efficiency. [Solving Means] A vertical cavity surface emitting laser element according to the present technology includes: an active layer; a first cladding layer; and an intermediate layer. The first cladding layer is provided on the active layer. The intermediate layer is provided on the first cladding layer, electrons in the intermediate layer having potential higher than potential of electrons in the first cladding layer, holes in the intermediate layer having potential higher than potential of holes in the first cladding layer.Type: GrantFiled: February 20, 2019Date of Patent: April 30, 2024Assignee: SONY CORPORATIONInventors: Mikihiro Yokozeki, Rintaro Koda, Shunsuke Kono, Katsunori Yanashima, Kota Tokuda
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Publication number: 20220344549Abstract: There is provided a light-emitting device (1) including: a light-emitting element (20); a light-transmissive heat dissipation member (11) having a plate shape; a wavelength conversion member (12) that takes in, from a side of a light scattering layer (12a), light that is emitted from the light-emitting element (20) and passes through the light-transmissive heat dissipation member (11), and converts a wavelength in a fluorescent layer (12b); a lateral heat dissipation member that has a plate shape, includes a high-heat conduction member (13) in contact with a side surface of the wavelength conversion member (12) via a light reflection member (14), and is in contact with an upper surface of the light-transmissive heat dissipation member (11); and a package (21) that houses the light-emitting element (20) and supports a wavelength conversion unit (100) including the light-transmissive heat dissipation member (11), the wavelength conversion member (12), and the lateral heat dissipation member.Type: ApplicationFiled: September 25, 2020Publication date: October 27, 2022Inventors: Satoshi WADA, Kento HAYASHI, Yuhki KAWAMURA, Masahiro MURAYAMA, Hisayoshi MOTOBAYASHI, Yoshiro TAKIGUCHI, Hidekazu KAWANISHI, Katsunori YANASHIMA
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Publication number: 20220190555Abstract: A compound semiconductor layer stack includes: a first layer 11 being formed on a base 14 and including an island-shaped Alx1Iny1Ga(1-x1-y1)N; a second layer 12 being formed on the first layer 11 and including Alx2Iny2Ga(1-x2-y2)N; and a third layer 13 being formed on an entire surface including a top of the second layer 12, the third layer 13 including Alx3Ga(1-x3)N (provided that the following hold true: 0?x1<1; 0?x2<1; 0?x3<1; 0?y1<1; and 0<y2<1), and the third layer 13 has a top surface 13A that is flat.Type: ApplicationFiled: March 31, 2020Publication date: June 16, 2022Inventors: KUNIHIKO TASAI, HIROSHI NAKAJIMA, HIDEKAZU KAWANISHI, KATSUNORI YANASHIMA
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Publication number: 20210320224Abstract: A light-emitting device according to one embodiment of the present disclosure includes: a substrate; a first quantum well layer including Alx2Inx1Ga(1-x1-x2)N (0<x1<1, 0?x2<1) and including a light-emitting region; a barrier layer provided between the substrate and the first quantum well layer; and a second quantum well layer including Aly2Iny1Ga(1-y1-y2)N (0<y1<1, 0?y2<1) and having a thickness of less than 4.0 monolayers and provided between the substrate and the barrier layer, at a position 8 nm or more and less than 50 nm away from the first quantum well layer.Type: ApplicationFiled: August 2, 2019Publication date: October 14, 2021Inventors: Kunihiko TASAI, Hidekazu KAWANISHI, Katsunori YANASHIMA
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Publication number: 20210159362Abstract: A light emitting device according to an embodiment of the present disclosure includes: a first layer including Alx2Inx1Ga(1-x1-x2) N (0<x1<1, 0?x2<1); a second layer that is provided on the first layer and includes Aly2Iny1Ga(1-y1-y2) N (0<y1<1, 0?y2<1) that is lattice relaxed with respect to the first layer; and a third layer that is provided on the second layer, includes Alz2Inz1Ga(1-z1-z2) N (0<z1<1, 0?z2<1) that is lattice relaxed with respect to the second layer, and includes an active layer. A lattice constant aGAN of GaN in an in-plane direction, a lattice constant al of the first layer in an in-plane direction, a lattice constant a2 of the second layer in an in-plane direction, and a lattice constant a3 of the third layer in an in-plane direction have a relationship of aGAN<a2<a1, a3.Type: ApplicationFiled: July 1, 2019Publication date: May 27, 2021Inventors: Kunihiko TASAI, Hiroshi NAKAJIMA, Hidekazu KAWANISHI, Katsunori YANASHIMA
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Publication number: 20210135050Abstract: A template substrate including: a first layer that includes Alx2Inx1Ga(1-x1-x2)N (0<x1<1, 0?x2<1) and has a lattice constant a1 in an in-plane direction greater than a lattice constant of GaN in the in-plane direction, the first layer being lattice-relaxed; a second layer that is stacked on the first layer to be lattice-matched to the first layer and includes AlyGa(1-y)N (0?y<1); and a third layer that is provided opposed to the first layer with the second layer being interposed therebetween, the third layer being lattice-matched to the second layer and including Alz2Inz1Ga(0-z1-z2)N (0<z1<1, 0?z2<1).Type: ApplicationFiled: June 19, 2018Publication date: May 6, 2021Inventors: Kunihiko TASAI, Hiroshi NAKAJIMA, Hidekazu KAWANISHI, Katsunori YANASHIMA
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Publication number: 20210057882Abstract: [Object] To provide a vertical cavity surface emitting laser element and an electronic apparatus that have high light emission efficiency. [Solving Means] A vertical cavity surface emitting laser element according to the present technology includes: an active layer; a first cladding layer; and an intermediate layer. The first cladding layer is provided on the active layer. The intermediate layer is provided on the first cladding layer, electrons in the intermediate layer having potential higher than potential of electrons in the first cladding layer, holes in the intermediate layer having potential higher than potential of holes in the first cladding layer.Type: ApplicationFiled: February 20, 2019Publication date: February 25, 2021Inventors: MIKIHIRO YOKOZEKI, RINTARO KODA, SHUNSUKE KONO, KATSUNORI YANASHIMA, KOTA TOKUDA
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Patent number: 10686291Abstract: A semiconductor light emitting element has a laminated structure formed by laminating a first compound semiconductor layer, an active layer, and a second compound semiconductor layer. The semiconductor light emitting element satisfies ?I2>?I1, where ?I1 is an operating current range when the temperature of the active layer is T1, and ?I2 is the operating current range when the temperature of the active layer is T2 (where T2>T1). The semiconductor light emitting element satisfies P2>P1, where P1 is a maximum optical output emitted when the temperature of the active layer is T1, and P2 is the maximum optical output emitted when the temperature of the active layer is T2 (where T2>T1).Type: GrantFiled: December 17, 2015Date of Patent: June 16, 2020Assignee: Sony CorporationInventors: Hideki Watanabe, Katsunori Yanashima, Rintaro Koda, Moe Takeo, Nobukata Okano
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Patent number: 10236663Abstract: A semiconductor optical device includes a laminated structure constituted of a first compound semiconductor layer of an n type, an active layer, and a second compound semiconductor layer of a p type, the active layer including at least 3 barrier layers and well layers interposed among the barrier layers, and the semiconductor optical device satisfying Egp-BR>Egn-BR>EgWell when a bandgap energy of the barrier layer adjacent to the second compound semiconductor layer is represented by Egp-BR, a bandgap energy of the barrier layer between the well layers is represented by EgWell, and a bandgap energy of the barrier layer adjacent to the first compound semiconductor layer is represented by Egn-BR.Type: GrantFiled: March 11, 2016Date of Patent: March 19, 2019Assignee: SONY CORPORATIONInventors: Katsunori Yanashima, Kunihiko Tasai
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Publication number: 20180138662Abstract: A semiconductor optical device includes a laminated structure constituted of a first compound semiconductor layer of an n type, an active layer, and a second compound semiconductor layer of a p type, the active layer including at least 3 barrier layers and well layers interposed among the barrier layers, and the semiconductor optical device satisfying Egp-BR>Egn-BR>EgWell when a bandgap energy of the barrier layer adjacent to the second compound semiconductor layer is represented by Egp-BR, a bandgap energy of the barrier layer between the well layers is represented by EgWell, and a bandgap energy of the barrier layer adjacent to the first compound semiconductor layer is represented by Egn-BR.Type: ApplicationFiled: March 11, 2016Publication date: May 17, 2018Applicant: SONY CORPORATIONInventors: KATSUNORI YANASHIMA, KUNIHIKO TASAI
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Patent number: 9911894Abstract: A method for manufacturing a light-emitting diode, which includes the steps of: providing a substrate having a plurality of protruded portions on one main surface thereof wherein the protruded portion is made of a material different in type from that of the substrate and growing a first nitride-based III-V Group compound semiconductor layer on each recess portion of the substrate through a state of making a triangle in section wherein a bottom surface of the recess portion becomes a base of the triangle; laterally growing a second nitride-based III-V Group compound semiconductor layer on the substrate from the first nitride-based III-V Group compound semiconductor layer; and successively growing, on the second nitride-based III-V Group compound semiconductor layer, a third nitride-based III-V Group compound semiconductor layer of a first conduction type, an active layer, and a fourth nitride-based III-V compound semiconductor layer of a second conduction type.Type: GrantFiled: April 17, 2015Date of Patent: March 6, 2018Assignee: SONY CORPORATIONInventors: Akira Ohmae, Michinori Shiomi, Noriyuki Futagawa, Takaaki Ami, Takao Miyajima, Yuuji Hiramatsu, Izuho Hatada, Nobukata Okano, Shigetaka Tomiya, Katsunori Yanashima, Tomonori Hino, Hironobu Narui
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Publication number: 20180054039Abstract: A semiconductor light emitting element has a laminated structure formed by laminating a first compound semiconductor layer, an active layer, and a second compound semiconductor layer. The semiconductor light emitting element satisfies ?I2>?I1, where ?I1 is an operating current range when the temperature of the active layer is T1, and ?I2 is the operating current range when the temperature of the active layer is T2 (where T2>T1). The semiconductor light emitting element satisfies P2>P1, where P1 is a maximum optical output emitted when the temperature of the active layer is T1, and P2 is the maximum optical output emitted when the temperature of the active layer is T2 (where T2>T1).Type: ApplicationFiled: December 17, 2015Publication date: February 22, 2018Inventors: Hideki WATANABE, Katsunori YANASHIMA, Rintaro KODA, Moe TAKEO, Nobukata OKANO
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Patent number: 9425348Abstract: In a group III nitride semiconductor device according to one aspect of the present invention, in a p-type group III nitride semiconductor region formed on a semi-polar plane substrate, the concentration of hydrogen (H) contained in the p-type group III nitride semiconductor region is 25% or less of the concentration of a p-type dopant therein, and the concentration of oxygen contained in the p-type group III nitride semiconductor region is 5×1017 atoms/cm3 or lower, and an angle between a normal axis of a primary surface of the semi-polar plane substrate and a c-axis of the semi-polar plane substrate is not lower than 45 degrees and not higher than 80 degrees or not lower than 100 degrees and not higher than 135 degrees in a waveguide axis direction of the group III nitride semiconductor device.Type: GrantFiled: October 22, 2014Date of Patent: August 23, 2016Assignees: Summitomo Electric Industries, Ltd., SONY CORPORATIONInventors: Nobuhiro Saga, Shinji Tokuyama, Kazuhide Sumiyoshi, Takashi Kyono, Koji Katayama, Tatsushi Hamaguchi, Katsunori Yanashima
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Patent number: 9231370Abstract: A group III nitride semiconductor laser device includes a laser structure, an insulating layer, an electrode and dielectric multilayers. The laser structure includes a semiconductor region on a semi-polar primary surface of a hexagonal group III nitride semiconductor support base. The dielectric multilayers are on first and second end-faces for the laser cavity. The c-axis of the group III nitride tilts by an angle ALPHA from the normal axis of the primary surface in the waveguide axis direction from the first end-face to the second end-faces. A pad electrode has first to third portions provided on the first to third regions of the semiconductor regions, respectively. An ohmic electrode is in contact with the third region through an opening of the insulating layer. The first portion has a first arm, which extends to the first end-face edge. The third portion is away from the first end-face edge.Type: GrantFiled: April 23, 2012Date of Patent: January 5, 2016Assignees: Sumitomo Electric Industries, Ltd., SONY CORPORATIONInventors: Takamichi Sumitomo, Takashi Kyono, Masaki Ueno, Yusuke Yoshizumi, Yohei Enya, Masahiro Adachi, Shimpei Takagi, Katsunori Yanashima
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Patent number: 9231375Abstract: A semiconductor device includes: a semiconductor substrate made of a hexagonal Group III nitride semiconductor and having a semi-polar plane; and an epitaxial layer formed on the semi-polar plane of the semiconductor substrate and including a first cladding layer of a first conductive type, a second cladding layer of a second conductive type, and a light-emitting layer formed between the first cladding layer and the second cladding layer, the first cladding layer being made of Inx1Aly1Ga1-x1-y1N, where x1>0 and y1>0, the second cladding layer being made of Inx2Aly2Ga1-x2-y2N, where0?x2?about 0.02 and about 0.03?y2?about 0.07.Type: GrantFiled: February 12, 2013Date of Patent: January 5, 2016Assignees: Sony Corporation, Sumitomo Electric Industries, Ltd.Inventors: Kunihiko Tasai, Hiroshi Nakajima, Noriyuki Futagawa, Katsunori Yanashima, Yohei Enya, Tetsuya Kumano, Takashi Kyono
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Publication number: 20150228846Abstract: A method for manufacturing a light-emitting diode, which includes the steps of: providing a substrate having a plurality of protruded portions on one main surface thereof wherein the protruded portion is made of a material different in type from that of the substrate and growing a first nitride-based III-V Group compound semiconductor layer on each recess portion of the substrate through a state of making a triangle in section wherein a bottom surface of the recess portion becomes a base of the triangle; laterally growing a second nitride-based III-V Group compound semiconductor layer on the substrate from the first nitride-based III-V Group compound semiconductor layer; and successively growing, on the second nitride-based III-V Group compound semiconductor layer, a third nitride-based III-V Group compound semiconductor layer of a first conduction type, an active layer, and a fourth nitride-based III-V compound semiconductor layer of a second conduction type.Type: ApplicationFiled: April 17, 2015Publication date: August 13, 2015Inventors: Akira Ohmae, Michinori Shiomi, Noriyuki Futagawa, Takaaki Ami, Takao Miyajima, Yuuji Hiramatsu, Izuho Hatada, Nobukata Okano, Shigetaka Tomiya, Katsunori Yanashima, Tomonori Hino, Hironobu Narui
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Patent number: 9034738Abstract: A method for manufacturing a light-emitting diode, which includes the steps of: providing a substrate having a plurality of protruded portions on one main surface thereof wherein the protruded portion is made of a material different in type from that of the substrate and growing a first nitride-based III-V Group compound semiconductor layer on each recess portion of the substrate through a state of making a triangle in section wherein a bottom surface of the recess portion becomes a base of the triangle; laterally growing a second nitride-based III-V Group compound semiconductor layer on the substrate from the first nitride-based III-V Group compound semiconductor layer; and successively growing, on the second nitride-based III-V Group compound semiconductor layer, a third nitride-based III-V Group compound semiconductor layer of a first conduction type, an active layer, and a fourth nitride-based III-V compound semiconductor layer of a second conduction type.Type: GrantFiled: September 21, 2006Date of Patent: May 19, 2015Assignee: SONY CORPORATIONInventors: Akira Ohmae, Michinori Shiomi, Noriyuki Futagawa, Takaaki Ami, Takao Miyajima, Yuuji Hiramatsu, Izuho Hatada, Nobukata Okano, Shigetaka Tomiya, Katsunori Yanashima, Tomonori Hino, Hironobu Narui
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Publication number: 20150115312Abstract: In a group III nitride semiconductor device according to one aspect of the present invention, in a p-type group III nitride semiconductor region formed on a semi-polar plane substrate, the concentration of hydrogen (H) contained in the p-type group III nitride semiconductor region is 25% or less of the concentration of a p-type dopant therein, and the concentration of oxygen contained in the p-type group III nitride semiconductor region is 5×1017 atoms/cm3 or lower, and an angle between a normal axis of a primary surface of the semi-polar plane substrate and a c-axis of the semi-polar plane substrate is not lower than 45 degrees and not higher than 80 degrees or not lower than 100 degrees and not higher than 135 degrees in a waveguide axis direction of the group III nitride semiconductor device.Type: ApplicationFiled: October 22, 2014Publication date: April 30, 2015Inventors: Nobuhiro Saga, Shinji Tokuyama, Kazuhide Sumiyoshi, Takashi Kyono, Koji Katayama, Tatsushi Hamaguchi, Katsunori Yanashima
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Publication number: 20150050768Abstract: A laser diode device includes: a semiconductor substrate including a semi-polar surface, the semiconductor substrate being formed of a hexagonal III-nitride semiconductor; an epitaxial layer including a light emitting layer, the epitaxial layer being formed on the semi-polar surface of the semiconductor substrate, and the epitaxial layer including a ridge section; a first electrode formed on a top surface of the ridge section; an insulating layer covering the epitaxial layer in an adjacent region of the ridge section and a side surface of the ridge section, the insulating layer covering part or all of side surfaces of the first electrode continuously from the epitaxial layer; a pad electrode formed to cover a top surface of the first electrode and the insulating layer, the pad electrode being electrically connected to the first electrode; and a second electrode formed on a surface, of the semiconductor substrate, opposite to the semi-polar surface.Type: ApplicationFiled: September 26, 2014Publication date: February 19, 2015Inventors: Noriyuki FUTAGAWA, Hiroshi NAKAJIMA, Katsunori YANASHIMA, Takashi KYONO, Masahiro ADACHI
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Patent number: 8953656Abstract: A Group III nitride semiconductor laser device includes a laser structure including a support substrate with a semipolar primary surface of a hexagonal Group III nitride semiconductor, and a semiconductor region thereon, and an electrode, provided on the semiconductor region, extending in a direction of a waveguide axis in the laser device. The c-axis of the nitride semiconductor is inclined at an angle ALPHA relative to a normal axis to the semipolar surface toward the waveguide axis direction. The laser structure includes first and second fractured faces intersecting with the waveguide axis. A laser cavity of the laser device includes the first and second fractured faces extending from edges of first and second faces. The first fractured face includes a step provided at an end face of an InGaN layer of the semiconductor region and extending in a direction from one side face to the other of the laser device.Type: GrantFiled: January 19, 2012Date of Patent: February 10, 2015Assignees: Sumitomo Electric Industries, Ltd., Sony CorporationInventors: Takashi Kyono, Shimpei Takagi, Takamichi Sumitomo, Yusuke Yoshizumi, Yohei Enya, Masaki Ueno, Katsunori Yanashima