Patents by Inventor Katsuo Katayama
Katsuo Katayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10676839Abstract: In an electrodeposition system, the final quality of a coating is prevented from being degraded due to a coating material-containing aqueous solution flowing out of a steel plate mating portion during a drying process, while derivative problems such as an increase in the size of the system, an increase in the initial costs and the running costs, and a decrease in reliability are avoided. A washing zone that is subsequent to an electrodeposition zone in which an object to be coated is immersed in a coating material solution for electrodeposition so that a coating is formed on a surface of the object to be coated is provided with: a hot water washing tank in which the coated object is washed by being immersed in high-temperature washing water in the tank; and a spray washer that sprays a steel plate mating portion of the coated-object with high-temperature washing water, subsequent to washing in the hot water washing tank.Type: GrantFiled: July 13, 2016Date of Patent: June 9, 2020Assignees: Mazda Motor Corporation, Taikisha Ltd.Inventors: Katsuo Katayama, Hiroyuki Nakagawa, Hiroaki Tsuji, Akira Kawanami, Shintarou Kouno, Shigetaka Tooka, Shizuko Kurokawa
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Publication number: 20180202064Abstract: In an electrodeposition system, the final quality of a coating is prevented from being degraded due to a coating material-containing aqueous solution flowing out of a steel plate mating portion during a drying process, while derivative problems such as an increase in the size of the system, an increase in the initial costs and the running costs, and a decrease in reliability are avoided. A washing zone that is subsequent to an electrodeposition zone in which an object to be coated is immersed in a coating material solution for electrodeposition so that a coating is formed on a surface of the object to be coated is provided with: a hot water washing tank in which the coated object is washed by being immersed in high-temperature washing water in the tank; and a spray washer that sprays a steel plate mating portion of the coated-object with high-temperature washing water, subsequent to washing in the hot water washing tank.Type: ApplicationFiled: July 13, 2016Publication date: July 19, 2018Inventors: Katsuo Katayama, Hiroyuki Nakagawa, Hiroaki Tsuji, Akira Kawanami, Shintarou Kouno, Shigetaka Tooka, Shizuko Kurokawa
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Publication number: 20090137114Abstract: A semiconductor device is manufactured by a method including forming a first interlayer insulating film. A first etching stopper film is formed on the first interlayer insulating film. A conductive layer is formed on the first etching stopper film. A second etching stopper film is formed to cover the conductive layer, an upper surface of the conductive layer and both side surfaces of the conductive layer. A second interlayer insulating film is formed on the second etching stopper film. A hole is formed penetrating the second interlayer insulating film in a direction of thickness and reaching the conductive layer. An interconnect is formed in the hole. The step of forming a hole includes etching the second interlayer insulating film under a first etching condition, and etching the second etching stopper film under a second etching condition different from the first etching condition. The second etching condition includes using an etching gas containing C, F, and H.Type: ApplicationFiled: November 19, 2008Publication date: May 28, 2009Applicant: RENESAS TECHNOLOGY CORP.Inventors: Katsuhiro Uesugi, Katsuo Katayama, Katsuhisa Sakai
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Patent number: 7465662Abstract: A semiconductor device is manufactured by a method including forming a first interlayer insulating film. A first etching stopper film is formed on the first interlayer insulating film. A conductive layer is formed on the first etching stopper film. A second etching stopper film is formed to cover the conductive layer, an upper surface of the conductive layer and both side surfaces of the conductive layer. A second interlayer insulating film is formed on the second etching stopper film. A hole is formed penetrating the second interlayer insulating film in a direction of thickness and reaching the conductive layer. An interconnect is formed in the hole. The step of forming a hole includes etching the second interlayer insulating film under a first etching condition, and etching the second etching stopper film under a second etching condition different from the first etching condition.Type: GrantFiled: October 12, 2007Date of Patent: December 16, 2008Assignee: Renesas Technology Corp.Inventors: Katsuhiro Uesugi, Katsuo Katayama, Katsuhisa Sakai
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Publication number: 20080045006Abstract: An etching stopper film is formed on an interlayer insulating film. A conductive layer is formed on the etching stopper film. An etching stopper film is formed to cover the conductive layer. An interlayer insulating film is formed on the etching stopper film. In a structure above, initially, a hole vertically penetrating the interlayer insulating film for exposing a surface of the etching stopper film is formed under a first etching condition. Thereafter, the etching stopper film serving as a bottom surface of the hole is removed under a second etching condition, thereby forming the hole reaching the conductive layer. An interconnection is embedded in the hole. A semiconductor device in which a hole reaching the conductive layer is prevented from extending as far as the lower interlayer insulating film as a result of misalignment, as well as a manufacturing method thereof are thus obtained.Type: ApplicationFiled: October 12, 2007Publication date: February 21, 2008Applicant: RENESAS TECHNOLOGY CORP.Inventors: Katsuhiro Uesugi, Katsuo Katayama, Katsuhisa Sakai
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Patent number: 7301237Abstract: An etching stopper film is formed on an interlayer insulating film. A conductive layer is formed on the etching stopper film. An etching stopper film is formed to cover the conductive layer. An interlayer insulating film is formed on the etching stopper film. In a structure above, initially, a hole vertically penetrating the interlayer insulating film for exposing a surface of the etching stopper film is formed under a first etching condition. Thereafter, the etching stopper film serving as a bottom surface of the hole is removed under a second etching condition, thereby forming the hole reaching the conductive layer. An interconnection is embedded in the hole. A semiconductor device in which a hole reaching the conductive layer is prevented from extending as far as the lower interlayer insulating film as a result of misalignment, as well as a manufacturing method thereof are thus obtained.Type: GrantFiled: September 20, 2005Date of Patent: November 27, 2007Assignee: Renesas Technology Corp.Inventors: Katsuhiro Uesugi, Katsuo Katayama, Katsuhisa Sakai
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Publication number: 20060063372Abstract: An etching stopper film is formed on an interlayer insulating film. A conductive layer is formed on the etching stopper film. An etching stopper film is formed to cover the conductive layer. An interlayer insulating film is formed on the etching stopper film. In a structure above, initially, a hole vertically penetrating the interlayer insulating film for exposing a surface of the etching stopper film is formed under a first etching condition. Thereafter, the etching stopper film serving as a bottom surface of the hole is removed under a second etching condition, thereby forming the hole reaching the conductive layer. An interconnection is embedded in the hole. A semiconductor device in which a hole reaching the conductive layer is prevented from extending as far as the lower interlayer insulating film as a result of misalignment, as well as a manufacturing method thereof are thus obtained.Type: ApplicationFiled: September 20, 2005Publication date: March 23, 2006Inventors: Katsuhiro Uesugi, Katsuo Katayama, Katsuhisa Sakai
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Patent number: 6091045Abstract: A plasma processing apparatus and a plasma processing method used in etching, ashing, CVD, etc. in the manufacturing, etc. of large-scale integrated circuits (LSIs) and liquid crystal display panels (LCDs). The plasma processing apparatus includes a dielectric plate used for the passage of a microwave, a microwave window disposed to confront the dielectric plate, and a reaction chamber in which a sample stage is disposed to confront the microwave window. The apparatus is characterized in that the microwave window has a recess in the area confronting the sample stage. The plasma processing method is characterized by implementing a plasma process for a sample with the plasma processing apparatus. The method and apparatus are capable of raising the plasma density in the area confronting the sample, improving the plasma processing rate, improving the etch-through performance for fine hole patterns, and improving the yield of semiconductor devices.Type: GrantFiled: November 26, 1997Date of Patent: July 18, 2000Assignee: Sumitomo Metal Industries, Inc.Inventors: Hiroshi Mabuchi, Junya Tsuyuguchi, Katsuo Katayama, Toshihiro Hayami, Hideo Ida, Tomomi Murakami, Naohiko Takeda
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Patent number: 5951887Abstract: A plasma processing apparatus and plasma processing method are provided to be used for etching, ashing, CVD, etc. in the manufacturing, etc. of large-scale integrated circuits (LSIs) and liquid crystal display panels (LCDs). The plasma processing apparatus generates plasma by using a microwave introduced through a microwave window, while controlling the ions in the plasma by varying the RF voltage applied to the sample stage. The apparatus is characterized to include a counter electrode (grounded electrode) which is located at the rim section of the microwave window against the sample stage. The plasma processing method implements a plasma process for a sample with the plasma processing apparatus. The method and apparatus are capable of alleviating the sticking of particles to the sample and metallic contamination, and also capable of improving the yield of semiconductor devices, etc.Type: GrantFiled: November 26, 1997Date of Patent: September 14, 1999Assignee: Sumitomo Metal Industries, Ltd.Inventors: Hiroshi Mabuchi, Toshihiro Hayami, Hideo Ida, Tomomi Murakami, Naohiko Takeda, Junya Tsuyuguchi, Katsuo Katayama
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Patent number: 5911852Abstract: A plasma processing apparatus includes a conductive thin film provided on a surface of a microwave introducing member which is exposed to a processing chamber, in which an object to be processed is placed. The conductive thin film is provided at the entire portion excluding a transmission portion, through which microwaves pass into the processing chamber. The conductive thin film is grounded to act as an electrode.Type: GrantFiled: June 14, 1996Date of Patent: June 15, 1999Assignee: Sumitomo Metal Industries LimitedInventors: Katsuo Katayama, Kyouichi Komachi, Kouichi Iio, Takeshi Akimoto
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Patent number: 5804923Abstract: A plasma processing apparatus includes a microwave introducing member, which is provided with a microwave transmission opening through which microwaves pass into a processing chamber. The microwave introducing member is also provided at a transmission opening with a dielectric member. Preferably, the dielectric member is formed to have a relative dielectric constant of 4 to 10 and an insulation resistance of 10.sup.8 to 10.sup.12 .OMEGA..Type: GrantFiled: June 14, 1996Date of Patent: September 8, 1998Assignee: Sumitomo Metal Industries LimitedInventors: Kouichi Iio, Kyouichi Komachi, Katsuo Katayama, Takeshi Akimoto
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Patent number: 5545258Abstract: A microwave plasma processing system, wherein a conductor disposed for controlling the anisotropy and the acceleration energy of ions in a plasma has inside a flow path for reactant gasses and a plurality of holes through which the gasses are to be blown toward a sample holder.A microwave plasma processing system, wherein the ratio of the total area of microwave transmission holes to the area of a conductor is set to be in a range of 0.25 to 0.65.A microwave plasma processing system, wherein each microwave transmission hole formed in a conductor has a dimension in the microwave traveling direction greater than that in a direction perpendicular to the traveling direction.Type: GrantFiled: June 13, 1995Date of Patent: August 13, 1996Assignees: Sumitomo Metal Industries, Ltd., NEC CorporationInventors: Katsuo Katayama, Kyoichi Komachi, Hiroshi Mabuchi, Takeshi Akimoto
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Patent number: 5529632Abstract: A microwave plasma processing system has heating means for heating the wall of a reaction chamber, and an adhesion preventing member in which a cylinder disposed so as to be in contact with the inner face of a wall of the reaction chamber and a microwave reflecting plate having a gas discharge hole are integrally formed.A microwave plasma processing system has heating means for heating the wall of a reaction chamber, and a microwave reflecting plate which is attached to the inner face of a wall of the reaction chamber and which has a gas discharge hole.Type: GrantFiled: June 13, 1995Date of Patent: June 25, 1996Assignees: Sumitomo Metal Industries, Ltd., NEC CorporationInventors: Katsuo Katayama, Kyoichi Komachi, Hiroshi Mabuchi, Takeshi Akimoto