Patents by Inventor Katsuo Ohki

Katsuo Ohki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11709199
    Abstract: As a semiconductor device is miniaturized, a scribe area on a wafer also tends to decrease. Accordingly, it is necessary to reduce the size of a TEG arranged in the scribe area, and efficiently arrange an electrode pad for probe contact. Therefore, it is necessary to associate probes and the efficient layout of the electrode pad. The purpose of the present invention is to provide a technique for associating probes and the layout of the electrode pads of a TEG so as to facilitate the evaluation of electrical characteristics. According to an evaluation apparatus for a semiconductor device of the present invention, the above described problems can be solved by providing a plurality of probes arranged in a fan shape or probes manufactured by Micro Electro Mechanical Systems (MEMS) technology.
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: July 25, 2023
    Assignee: Hitachi High-Tech Corporation
    Inventors: Tomohisa Ohtaki, Takayuki Mizuno, Ryo Hirano, Toru Fujimura, Shigehiko Kato, Yasuhiko Nara, Katsuo Ohki, Akira Kageyama, Masaaki Komori
  • Patent number: 11391756
    Abstract: As a semiconductor device is miniaturized, a scribe area on a wafer also tends to decrease. Accordingly, it is necessary to reduce the size of a TEG arranged in the scribe area, and efficiently arrange an electrode pad for probe contact. Therefore, it is necessary to associate probes and the efficient layout of the electrode pad. The purpose of the present invention is to provide a technique for associating probes and the layout of an electrode pad of a TEG to facilitate the evaluation of electrical characteristics. According to the present invention, the above described problem can be solved by arranging a plurality of probes in a fan shape or manufacturing the probes with micro electro mechanical systems (MEMS) technology.
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: July 19, 2022
    Assignee: Hitachi High-Tech Corporation
    Inventors: Ryo Hirano, Takayuki Mizuno, Tomohisa Ohtaki, Toru Fujimura, Shigehiko Kato, Yasuhiko Nara, Katsuo Ohki, Akira Kageyama, Masaaki Komori
  • Publication number: 20210048450
    Abstract: As a semiconductor device is miniaturized, a scribe area on a wafer also tends to decrease. Accordingly, it is necessary to reduce the size of a TEG arranged in the scribe area, and efficiently arrange an electrode pad for probe contact. Therefore, it is necessary to associate probes and the efficient layout of the electrode pad. The purpose of the present invention is to provide a technique for associating probes and the layout of the electrode pads of a TEG so as to facilitate the evaluation of electrical characteristics. According to a method for manufacturing a semiconductor device of the present invention, the above-described problems can be solved by providing a layout of a TEG electrode pad corresponding to a plurality of probes arranged in a fan shape or probes manufactured by Micro Electro Mechanical Systems (MEMS) technology.
    Type: Application
    Filed: February 6, 2018
    Publication date: February 18, 2021
    Inventors: Tomohisa OHTAKI, Takayuki MIZUNO, Ryo HIRANO, Toru FUJIMURA, Shigehiko KATO, Yasuhiko NARA, Katsuo OHKI, Akira KAGEYAMA, Masaaki KOMORI
  • Publication number: 20210033642
    Abstract: As a semiconductor device is miniaturized, a scribe area on a wafer also tends to decrease. Accordingly, it is necessary to reduce the size of a TEG arranged in the scribe area, and efficiently arrange an electrode pad for probe contact. Therefore, it is necessary to associate probes and the efficient layout of the electrode pad. The purpose of the present invention is to provide a technique for associating probes and the layout of an electrode pad of a TEG to facilitate the evaluation of electrical characteristics. According to the present invention, the above described problem can be solved by arranging a plurality of probes in a fan shape or manufacturing the probes with micro electro mechanical systems (MEMS) technology.
    Type: Application
    Filed: February 6, 2018
    Publication date: February 4, 2021
    Inventors: Ryo HIRANO, Takayuki MIZUNO, Tomohisa OHTAKI, Toru FUJIMURA, Shigehiko KATO, Yasuhiko NARA, Katsuo OHKI, Akira KAGEYAMA, Masaaki KOMORI
  • Publication number: 20210025936
    Abstract: As a semiconductor device is miniaturized, a scribe area on a wafer also tends to decrease. Accordingly, it is necessary to reduce the size of a TEG arranged in the scribe area, and efficiently arrange an electrode pad for probe contact. Therefore, it is necessary to associate probes and the efficient layout of the electrode pad. The purpose of the present invention is to provide a technique for associating probes and the layout of the electrode pads of a TEG so as to facilitate the evaluation of electrical characteristics. According to an evaluation apparatus for a semiconductor device of the present invention, the above described problems can be solved by providing a plurality of probes arranged in a fan shape or probes manufactured by Micro Electro Mechanical Systems (MEMS) technology.
    Type: Application
    Filed: February 6, 2018
    Publication date: January 28, 2021
    Inventors: Tomohisa OHTAKI, Takayuki MIZUNO, Ryo HIRANO, Toru FUJIMURA, Shigehiko KATO, Yasuhiko NARA, Katsuo OHKI, Akira KAGEYAMA, Masaaki KOMORI
  • Patent number: 5689572
    Abstract: In an active noise-reduction controlling apparatus, there are provided a reference sensor for outputting a reference signal corresponding to information about a noise source, a noise-reduction error sensor for detecting a noise-reduction condition, an adding acoustic wave source controlled to produce an acoustic wave having the same amplitude as that of an acoustic wave received at the noise-reduction error sensor and having a phase opposite to that of the acoustic wave received as the noise-reduction error sensor; a first adaptive digital filter for processing the reference signal to output a control signal of the adding acoustic wave source, a second adaptive digital filter for setting a predicted value of a transfer function between an input signal of the adding acoustic wave source and an output signal of said noise-reduction error sensor, a filter coefficient controlling unit for optimizing a coefficient of the first adaptive digital filter with employment of the predicted value of the transfer function
    Type: Grant
    Filed: December 8, 1994
    Date of Patent: November 18, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Katsuo Ohki, Shinichi Shimode, Yukiji Iwase, Osamu Sekiguchi, Masanori Watanabe, Takahiro Daikoku, Tamotsu Tsukaguchi, Shigeru Koizumi
  • Patent number: 5548411
    Abstract: A facsimile apparatus has a lower structure and an upper structure which is swingable between a raised open position an a lowered close position about a pivot located at a lower part of the rear end portion of the apparatus. A thermal print head is fixed to the front end portion of the upper structure. A recording medium conveyor roller is fixed to the front end portion of the lower structure. A linear image sensor and an original sheet conveyor roller are fixed to a central portion of the lower structure. The recording medium is placed on the lower structure at a position between the thermal print head and the linear image sensor.
    Type: Grant
    Filed: April 24, 1995
    Date of Patent: August 20, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Kazutaka Sato, Michihiro Watanabe, Masahisa Aoyagi, Taisaku Seino, Katsuo Ohki, Hiromitsu Fukuda, Hideyuki Kawase, Kimio Oga, Akira Shimizu, Youichi Narui, Tsuguo Suzuki, Yasuo Otsuka, Kazutoshi Konno
  • Patent number: 5452098
    Abstract: A facsimile apparatus has a lower structure and an upper structure which is swingable between a raised open position an a lowered closed position about a pivot located at a lower part of the rear end portion of the apparatus. A thermal print head is fixed to the front end portion of the upper structure. A recording medium conveyor roller is fixed to the front end portion of the lower structure. A linear image sensor and an original sheet conveyor roller are fixed to a central portion of the lower structure. The recording medium is placed on the lower structure at a position between the thermal print head and the linear image sensor.
    Type: Grant
    Filed: March 25, 1993
    Date of Patent: September 19, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Kazutaka Sato, Michihiro Watanabe, Masahisa Aoyagi, Taisaku Seino, Katsuo Ohki, Hiromitsu Fukuda, Hideyuki Kawase, Kimio Oga, Akira Shimizu, Youichi Narui, Tsuguo Suzuki, Yasuo Otsuka, Kazutoshi Konno