Patents by Inventor Katsushi Hashio

Katsushi Hashio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11926923
    Abstract: An indium phosphide single crystal including a straight body portion having a cylindrical shape, wherein a residual strain in a tangential direction in an outer circumferential portion is a compressive strain, the outer circumferential portion extending between an inner circumferential surface located 10 mm inward from an outer circumferential surface of the straight body portion toward a central axis and a location located 5 mm inward from the outer circumferential surface. There is also provided an indium phosphide single crystal substrate, wherein a residual strain in a tangential direction in an outer circumferential portion is a compressive strain, the outer circumferential portion extending between an inner circumference located 10 mm inward from an outer circumference toward a center and a location located 5 mm inward from the outer circumference.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: March 12, 2024
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Katsushi Hashio, Kazuaki Kounoike, Takuya Yanagisawa
  • Publication number: 20220213618
    Abstract: An indium phosphide single-crystal body has an oxygen concentration of less than 1×1016 atoms·cm?3, and includes a straight body portion having a cylindrical shape, wherein a diameter of the straight body portion is more than or equal to 100 mm and less than or equal to 150 mm or is more than 100 mm and less than or equal to 150 mm. An indium phosphide single-crystal substrate has an oxygen concentration of less than 1×1016 atoms·cm?3, wherein a diameter of the indium phosphide single-crystal substrate is more than or equal to 100 mm and less than or equal to 150 mm or is more than 100 mm and less than or equal to 150 mm.
    Type: Application
    Filed: March 25, 2022
    Publication date: July 7, 2022
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Takuya Yanagisawa, Kazuaki Konoike, Katsushi Hashio
  • Patent number: 11319646
    Abstract: The gallium arsenide single crystal substrate has a circular main surface, and when the diameter of the main surface of the gallium arsenide single crystal substrate is represented by D and the number of etch pits formed on the main surface by immersing the gallium arsenide single crystal substrate in molten potassium hydroxide at 500° C. for 10 minutes is counted, the number C1 of etch pits in a first circular region having a diameter of 0.2D around the center of the main surface is 0 or more and 10 or less.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: May 3, 2022
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroshi Fukunaga, Masanori Morishita, Tatsuya Moriwake, Katsushi Hashio
  • Patent number: 11313050
    Abstract: An indium phosphide single-crystal body has an oxygen concentration of less than 1×1016 atoms·cm?3, and includes a straight body portion having a cylindrical shape, wherein a diameter of the straight body portion is more than or equal to 100 mm and less than or equal to 150 mm or is more than 100 mm and less than or equal to 150 mm. An indium phosphide single-crystal substrate has an oxygen concentration of less than 1×1016 atoms·cm?13, wherein a diameter of the indium phosphide single-crystal substrate is more than or equal to 100 mm and less than or equal to 150 mm or is more than 100 mm and less than or equal to 150 mm.
    Type: Grant
    Filed: July 3, 2018
    Date of Patent: April 26, 2022
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takuya Yanagisawa, Kazuaki Konoike, Katsushi Hashio
  • Publication number: 20210310155
    Abstract: The gallium arsenide single crystal substrate has a circular main surface, and when the diameter of the main surface of the gallium arsenide single crystal substrate is represented by D and the number of etch pits formed on the main surface by immersing the gallium arsenide single crystal substrate in molten potassium hydroxide at 500° C. for 10 minutes is counted, the number C1 of etch pits in a first circular region having a diameter of 0.2D around the center of the main surface is 0 or more and 10 or less.
    Type: Application
    Filed: July 10, 2019
    Publication date: October 7, 2021
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroshi FUKUNAGA, Masanori MORISHITA, Tatsuya MORIWAKE, Katsushi HASHIO
  • Patent number: 11024705
    Abstract: A semi-insulating gallium arsenide crystal substrate has a main surface with a plane orientation of (100) and a diameter of 2R mm, the main surface having a specific resistance with an average value of 5×107 ?·cm or more and with a standard deviation divided by the average value of the specific resistance, or with a coefficient of variation, of 0.50 or less in each of three measurement areas having their centers at distances of 0 mm, 0.5R mm, and (R-17) mm, respectively, from the center of the main surface in the [010] direction.
    Type: Grant
    Filed: September 21, 2017
    Date of Patent: June 1, 2021
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shinya Kawamoto, Makoto Kiyama, Yukio Ishikawa, Katsushi Hashio
  • Patent number: 10971374
    Abstract: A semi-insulating compound semiconductor substrate includes a semi-insulating compound semiconductor, the semi-insulating compound semiconductor substrate being configured such that, on a major plane having a plane orientation of (100), a standard deviation/average value of specific resistance measured at intervals of 0.1 mm along equivalent four directions in a <110> direction from a center of the major plane, and a standard deviation/average value of specific resistance measured at intervals of 0.1 mm along equivalent four directions in a <100> direction from the center of the major plane are each not more than 0.1.
    Type: Grant
    Filed: September 21, 2017
    Date of Patent: April 6, 2021
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Katsushi Hashio, Kazuaki Konoike, Takuya Yanagisawa
  • Publication number: 20210040644
    Abstract: An indium phosphide single crystal including a straight body portion having a cylindrical shape, wherein a residual strain in a tangential direction in an outer circumferential portion is a compressive strain, the outer circumferential portion extending between an inner circumferential surface located 10 mm inward from an outer circumferential surface of the straight body portion toward a central axis and a location located 5 mm inward from the outer circumferential surface. There is also provided an indium phosphide single crystal substrate, wherein a residual strain in a tangential direction in an outer circumferential portion is a compressive strain, the outer circumferential portion extending between an inner circumference located 10 mm inward from an outer circumference toward a center and a location located 5 mm inward from the outer circumference.
    Type: Application
    Filed: August 7, 2018
    Publication date: February 11, 2021
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Katsushi HASHIO, Kazuaki KOUNOIKE, Takuya YANAGISAWA
  • Publication number: 20200381509
    Abstract: A semi-insulating gallium arsenide crystal substrate has a main surface with a plane orientation of (100) and a diameter of 2R mm, the main surface having a specific resistance with an average value of 5×107 ?·cm or more and with a standard deviation divided by the average value of the specific resistance, or with a coefficient of variation, of 0.50 or less in each of three measurement areas having their centers at distances of 0 mm, 0.5R mm, and (R-17) mm, respectively, from the center of the main surface in the [010] direction.
    Type: Application
    Filed: September 21, 2017
    Publication date: December 3, 2020
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Shinya KAWAMOTO, Makoto KIYAMA, Yukio ISHIKAWA, Katsushi HASHIO
  • Publication number: 20200017992
    Abstract: An indium phosphide single-crystal body has an oxygen concentration of less than 1×1016 atoms·cm?3, and includes a straight body portion having a cylindrical shape, wherein a diameter of the straight body portion is more than or equal to 100 mm and less than or equal to 150 mm or is more than 100 mm and less than or equal to 150 mm. An indium phosphide single-crystal substrate has an oxygen concentration of less than 1×1016 atoms·cm?13, wherein a diameter of the indium phosphide single-crystal substrate is more than or equal to 100 mm and less than or equal to 150 mm or is more than 100 mm and less than or equal to 150 mm.
    Type: Application
    Filed: July 3, 2018
    Publication date: January 16, 2020
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Takuya YANAGISAWA, Kazuaki KONOIKE, Katsushi HASHIO
  • Publication number: 20190371620
    Abstract: A semi-insulating compound semiconductor substrate includes a semi-insulating compound semiconductor, the semi-insulating compound semiconductor substrate being configured such that, on a major plane having a plane orientation of (100), a standard deviation/average value of specific resistance measured at intervals of 0.1 mm along equivalent four directions in a <110> direction from a center of the major plane, and a standard deviation/average value of specific resistance measured at intervals of 0.1 mm along equivalent four directions in a <100> direction from the center of the major plane are each not more than 0.1.
    Type: Application
    Filed: September 21, 2017
    Publication date: December 5, 2019
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Katsushi HASHIO, Kazuaki KONOIKE, Takuya YANAGISAWA
  • Patent number: 6866714
    Abstract: A large semiconductor crystal has a diameter of at least 6 inches and a low dislocation density of not more than 1×104 cm?2. The crystal is preferably a single crystal of GaAs, or one of CdTe, InAs, GaSb, Si or Ge, and may have a positive boron concentration of not more than 1×1016 cm?3 and a carbon concentration of 0.5×1015 cm?3 to 1.5×1015 cm?3 with a uniform concentration throughout the crystal. Such a crystal can form a very thin wafer with a low dislocation density. A special method and apparatus for producing such a crystal is also disclosed.
    Type: Grant
    Filed: May 5, 2003
    Date of Patent: March 15, 2005
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Tomohiro Kawase, Katsushi Hashio, Shin-ichi Sawada, Masami Tatsumi
  • Patent number: 6780244
    Abstract: A large semiconductor crystal is produced by charging a raw material into a crucible in a reactor tube, sealing the reactor tube with a flange on an open end of the tube, pressurizing the interior of the tube to an elevated pressure with an inert gas, heating the tube with an externally arranged heater to melt the raw material to form a raw material melt in the crucible, and solidifying the raw material melt to grow the semiconductor crystal. A second raw material such as a group V element can be introduced as a vapor from a reservoir into the melt in the crucible to form a compound semiconductor material. The flange is sealed to the tube by an elastic seal member, of which the temperature is maintained below 400° C. throughout the process, to protect its elastic sealing properties.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: August 24, 2004
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Tomohiro Kawase, Katsushi Hashio, Shin-ichi Sawada, Masami Tatsumi
  • Publication number: 20030200913
    Abstract: A large semiconductor crystal has a diameter of at least 6 inches and a low dislocation density of not more than 1×104 cm−2. The crystal is preferably a single crystal of GaAs, or one of CdTe, InAs, GaSb, Si or Ge, and may have a positive boron concentration of not more than 1×1016 cm−3 and a carbon concentration of 0.5×1015 cm−3 to 1.5×1015 cm−3 with a very uniform concentration throughout the crystal. Such a crystal can form a very thin wafer with a low dislocation density. A special method and apparatus for producing such a crystal is also disclosed.
    Type: Application
    Filed: May 5, 2003
    Publication date: October 30, 2003
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Tomohiro Kawase, Katsushi Hashio, Shin-ichi Sawada, Masami Tatsumi
  • Publication number: 20030145782
    Abstract: A large semiconductor crystal is produced by charging a raw material into a crucible in a reactor tube, sealing the reactor tube with a flange on an open end of the tube, pressurizing the interior of the tube to an elevated pressure with an inert gas, heating the tube with an externally arranged heater to melt the raw material to form a raw material melt in the crucible, and solidifying the raw material melt to grow the semiconductor crystal. A second raw material such as a group V element can be introduced as a vapor from a reservoir into the melt in the crucible to form a compound semiconductor material. The flange is sealed to the tube by an elastic seal member, of which the temperature is maintained below 400° C. throughout the process, to protect its elastic sealing properties.
    Type: Application
    Filed: February 26, 2003
    Publication date: August 7, 2003
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Tomohiro Kawase, Katsushi Hashio, Shin-ichi Sawada, Masami Tatsumi
  • Patent number: 6572700
    Abstract: An apparatus and method of providing a large semiconductor crystal at a low cost are provided. The apparatus of producing a semiconductor crystal includes a reactor tube having an open end at least one end side, formed of any one material selected from the group consisting of silicon carbide, silicon nitride, aluminum nitride, and aluminum oxide, or of a composite material with any one material selected from the group consisting of silicon carbide, silicon nitride, aluminum nitride, boron nitride, aluminum oxide, magnesium oxide, mullite, and carbon as a base, and having an oxidation-proof or airtight film formed on the surface of the base, a kanthal heater arranged around the reactor tube in the atmosphere, a flange attached at the open end to seal the reactor tube, and a crucible mounted in the reactor tube to store material of a semiconductor crystal. The material stored in the crucible is heated and melted to form material melt. The material melt is solidified to grow a semiconductor crystal.
    Type: Grant
    Filed: February 7, 2001
    Date of Patent: June 3, 2003
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Tomohiro Kawase, Katsushi Hashio, Shin-ichi Sawada, Masami Tatsumi
  • Publication number: 20010008115
    Abstract: An apparatus and method of providing a large semiconductor crystal at a low cost are provided. The apparatus of producing a semiconductor crystal includes a reactor tube having an open end at least one end side, formed of any one material selected from the group consisting of silicon carbide, silicon nitride, aluminum nitride, and aluminum oxide, or of a composite material with any one material selected from the group consisting of silicon carbide, silicon nitride, aluminum nitride, boron nitride, aluminum oxide, magnesium oxide, mullite, and carbon as a base, and having an oxidation-proof or airtight film formed on the surface of the base, a kanthal heater arranged around the reactor tube in the atmosphere, a flange attached at the open end to seal the reactor tube, and a crucible mounted in the reactor tube to store material of a semiconductor crystal. The material stored in the crucible is heated and melted to form material melt. The material melt is solidified to grow a semiconductor crystal.
    Type: Application
    Filed: February 7, 2001
    Publication date: July 19, 2001
    Inventors: Tomohiro Kawase, Katsushi Hashio, Shin-Ichi Sawada, Masami Tatsumi
  • Patent number: 6254677
    Abstract: An apparatus for and method of producing a large semiconductor crystal at a low cost are provided. The apparatus for producing a semiconductor crystal includes a reactor (1) having an open end at both ends thereof, that is formed of any material selected from the group consisting of silicon carbide, silicon nitride, aluminum nitride, and aluminum oxide, or of a composite material including a base material selected from the group consisting of silicon carbide, silicon nitride, aluminum nitride, boron nitride, aluminum oxide, magnesium oxide, mullite, and carbon as a base, and including an oxidation-proof or airtight film formed on the surface of the base. The apparatus further includes a resistance heater (3) arranged around the reactor (1) in the atmosphere, a flange (9) attached at the open end to seal the reactor (1), and a crucible (2) mounted in the reactor (1) to store material of a semiconductor crystal. The material stored in the crucible (2) is heated and melted to form a material melt (60).
    Type: Grant
    Filed: December 21, 1998
    Date of Patent: July 3, 2001
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Katsushi Hashio, Shin-ichi Sawada, Masami Tatsumi
  • Patent number: 5951758
    Abstract: According to the present invention, in the growth of an oxide single crystal or a compound semiconductor single crystal such as GaAs single crystal by the CZ method or LEC method, the tendency of concave solid-liquid interface shape at the periphery of the growing crystal can be suppressed to prevent polycrystallization without localized heating of the solid-liquid interface, while controlling the diameter of the growing crystal even when using a crucible with a larger diameter, thus improving the yield of crystal on a commercial scale. In the invention, the end of a cylindrical body having an inner diameter of larger than the predetermined diameter of straight part of the growing crystal is immersed in the raw material melt or liquid encapsulant and the crystal is pulled while preventing the shape of the solid-liquid interface from becoming concave by controlling the rotation rate of at least one of a crucible holding the raw material melt, the growing crystal and cylindrical body.
    Type: Grant
    Filed: September 25, 1997
    Date of Patent: September 14, 1999
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Katsushi Hashio, Shin-ichi Sawada, Masami Tatsumi
  • Patent number: 5733371
    Abstract: According to the present invention, in the growth of an oxide single crystal or a compound semiconductor single crystal such as GaAs single crystal by the CZ method or LEC method, the tendency of concave solid-liquid interface shape at the periphery of the growing crystal can be suppressed to prevent polycrystallization without localized heating of the solid-liquid interface, while controlling the diameter of the growing crystal even when using a crucible with a larger diameter, thus improving the yield of crystal on a commercial scale. In the invention, the end of a cylindrical body having an inner diameter of larger than the predetermined diameter of straight part of the growing crystal is immersed in the raw material melt or liquid encapsulant and the crystal is pulled while preventing the shape of the solid-liquid interface from becoming concave by controlling the rotation rate of at least one of a crucible holding the raw material melt, the growing crystal and cylindrical body.
    Type: Grant
    Filed: March 15, 1996
    Date of Patent: March 31, 1998
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Katsushi Hashio, Shin-ichi Sawada, Masami Tatsumi