Patents by Inventor Katsushi Yokozaki

Katsushi Yokozaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6236690
    Abstract: A direct-conversion receiver includes a local oscillator for generating a local oscillator signal, a converter circuit for converting a received radio signal into a pair of a baseband I signal and a baseband Q signal in response to the local oscillator signal, a demodulator for demodulating the pair of the baseband I signal and the baseband Q signal into a demodulation-resultant signal which is neither an I signal nor a Q signal, a detector circuit for detecting a difference between a frequency of the local oscillator signal and a frequency of a carrier of the received radio signal, a clock signal generator for generating a first clock signal providing a timing which corresponds to a center of a symbol period, a signal delay device for delaying the first clock signal to provide a second clock signal, and a symbol deciding circuit for deciding a logic state of the demodulation-resultant signal at a timing determined by the second clock signal.
    Type: Grant
    Filed: June 14, 1999
    Date of Patent: May 22, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiro Mimura, Makoto Hasegawa, Katsushi Yokozaki, Hiroyuki Harada, Takaaki Kishigami, Yasunari Tanaka
  • Patent number: 5987075
    Abstract: An FSK signal receiver includes an amplifier which amplifies a first FSK signal at an adjustable gain. A frequency converter converts an output signal from the amplifier into a second FSK signal having a frequency lower than a frequency of the first FSK signal. A demodulator demodulates the second FSK signal into a baseband signal. A bit-state detector detects a bit state from the baseband signal in response to a threshold. A calculator calculates a number of times of occurrence of a fact that the baseband signal moves across the threshold during a given time. The gain of the amplifier is adjusted in response to the number of times which is calculated by the calculator.
    Type: Grant
    Filed: December 10, 1997
    Date of Patent: November 16, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Katsuaki Abe, Takaaki Kishigami, Masahiro Mimura, Makoto Hasegawa, Katsushi Yokozaki, Yoichi Yamaki, Toshiyuki Tsumura, Hiroshi Katayama
  • Patent number: 5781588
    Abstract: An FSK signal receiver includes an amplifier which amplifies a first FSK signal at an adjustable gain. A frequency converter converts an output signal from the amplifier into a second FSK signal having a frequency lower than a frequency of the first FSK signal. A demodulator demodulates the second FSK signal into a baseband signal. A bit-state detector detects a bit state from the baseband signal in response to a threshold. A calculator calculates a number of times of occurrence of a fact that the baseband signal moves across the threshold during a given time. The gain of the amplifier is adjusted in response to the number of times which is calculated by the calculator.
    Type: Grant
    Filed: November 1, 1995
    Date of Patent: July 14, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Katsuaki Abe, Takaaki Kishigami, Masahiro Mimura, Makoto Hasegawa, Katsushi Yokozaki, Yoichi Yamaki, Toshiyuki Tsumura, Hiroshi Katayama
  • Patent number: 5640428
    Abstract: In a first direct conversion receiver for demodulating I and Q signals, having a quadrature relation therebetween, obtained from a received FSK signal through a direct conversion, a first D FF latches a level of the I signal when a sign condition of I and Q signals moves from the same to different sign conditions, a second D FF latches a level of the Q signal when the sign condition of the I and Q signals moves from the different to same sign condition and EXCLUSIVE OR operations are made among the I and Q signals and the outputs of the first and second D FFs to provide a frequent data judgement to improve a receiving sensitivity of an FSK signal having a relative low modulation index. In a second direct conversion receiver, a sign change in the Q signal is detected by a first edge detection circuit 17, a first D FF holds the level of the I signal, and an EXCLUSIVE OR circuit provides a first demodulation result.
    Type: Grant
    Filed: November 9, 1995
    Date of Patent: June 17, 1997
    Assignee: Matsushita Electric Industrial Co, Ltd.
    Inventors: Katsuaki Abe, Masahiro Mimura, Makoto Hasegawa, Kazunori Watanabe, Katsushi Yokozaki
  • Patent number: 5633898
    Abstract: A first AFC apparatus receives and detects I and Q signals from a received first FSK signal with a local osc signal; demodulates the I and Q signals; F/V-converts I or/and Q signals into a voltage; compares it with a reference; and detects a frequency deviation direction of the local osc signal from the carrier signal according to the results of comparing and the demodulating. The local osc frequency is controlled by a given amount according to the result of the frequency deviation direction detection. A second AFC apparatus receives and detects I and Q signals using a first osc signal; FSK-modulates the I and Q signals with a second local osc signal having a lower frequency than the first local osc signal; and compares the frequency of the second FSK signal and the second local osc signal to supply a demodulation result. A frequency control for the first local osc signal is obtained by an averaging circuit averaging the modulation result.
    Type: Grant
    Filed: December 21, 1994
    Date of Patent: May 27, 1997
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takaaki Kishigami, Katsuaki Abe, Masahiro Mimura, Makoto Hasegawa, Katsushi Yokozaki
  • Patent number: 5617451
    Abstract: A direct-conversion receiver includes a direct-conversion demodulator. A first device detects a strength of a received signal. A clock signal generator outputs a clock signal in response to a reception start signal. The clock signal has a frequency corresponding to a symbol rate or higher. A second device samples an output signal of the demodulator at a timing determined by the clock signal. A third device samples an output signal of the first device at a timing determined by the clock signal. A fourth device stores "n" output signals of the second device which relate to a signal periodically transmitted from a transmitting station "n" times, wherein "n" denotes a natural number equal to 2 or greater. A fifth device stores "n" output signals of the third device which correspond in timing to the "n" output signals of the second device. A sixth device reads out signals from the fourth device, and reads out signals from the fifth device.
    Type: Grant
    Filed: September 12, 1994
    Date of Patent: April 1, 1997
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiro Mimura, Makoto Hasegawa, Katsushi Yokozaki, Hiroyuki Harada, Takaaki Kishigami, Yasunari Tanaka
  • Patent number: 5450032
    Abstract: A first demodulator for generating a demodulated signal by demodulating first and second baseband signals obtained from a received frequency shift keying signal, comprises: a first mixer for mixing the first baseband signal with the second baseband signal; a frequency divider for 1/2-frequency-dividing an output of the first mixer; a second mixer for mixing the first baseband signal with an output of said frequency divider; and a frequency judging circuit for judging whether or not a frequency of an output of the second mixer is larger than a reference value to generate the demodulated signal. In order to effect the frequency judging by the frequency judging circuit always at a high frequency, there may be further provided a first inverter after the first mixer, a second inverter after the frequency judging circuit for compensating the inverting of the first inverter, and a frequency comparing circuit for detecting the frequency of the output of the first mixer.
    Type: Grant
    Filed: March 11, 1994
    Date of Patent: September 12, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiro Mimura, Makoto Hasegawa, Katsushi Yokozaki, Hiroyuki Harada
  • Patent number: 5414736
    Abstract: An FSK data receiving system is provided which is capable of constituting a direct-conversion receiver suitable for realizing an integrated circuit, is capable of decoding in a wide receiving band width, and is capable of realizing a small-sized and less-electric power consumption data receiving. An FSK-modulated local oscillator signal 3 is applied to a local oscillator 2, and there is provided a decode circuit 15 which obtains the decode signal 14 by judging whether the FSK-modulated frequency deviation of the carrier wave signal 1 is a positive deviation or a negative deviation on the basis of a comparison result of a voltage change in a frequency-voltage conversion circuit 16 for a base-band signal 8; i.e. the output signal of a frequency mixer 6.
    Type: Grant
    Filed: August 7, 1992
    Date of Patent: May 9, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Makoto Hasegawa, Kazuaki Takahashi, Masahiro Mimura, Kazunori Watanabe, Katsushi Yokozaki, Hiroyuki Harada
  • Patent number: 5293408
    Abstract: A data receiving system comprising an I base-band signal and a Q base-band signal which are used in a quadrature demodulation operation. Zero-crossing points of respective base-band signals are detected and a control signal is generated in response to each zero-crossing point. A phase-shift switching circuit alternately selects either the I base-band signal or the Q base-band signal in response to the control signal to generate an I/Q base-band signal. And, a demodulation operation is executed on the basis of the I/Q signal.
    Type: Grant
    Filed: September 9, 1992
    Date of Patent: March 8, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuaki Takahashi, Makoto Hasegawa, Katsushi Yokozaki, Yasumi Imagawa, Hiroyuki Harada, Masahiro Mimura, Yasuaki Namura
  • Patent number: 5264805
    Abstract: A limiter amplifier includes amplifiers connected in cascade each having differential outputs and differential inputs, and a lowpass filter connected between adjacent amplifiers. The filter includes resistors having different values connected between the differential outputs and the differential inputs of adjacent amplifiers, and a capacitor connected between the differential inputs of one of the adjacent amplifiers, the filter thereby limiting a high frequency characteristic of the limiter amplifier.
    Type: Grant
    Filed: June 8, 1992
    Date of Patent: November 23, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Katsushi Yokozaki