Patents by Inventor Katsushige Amano

Katsushige Amano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10437251
    Abstract: A method for controlling an autonomous device that moves in two dimensions using a controller includes obtaining a first image at a first position, which is a destination of the autonomous device, calculating, from the first image, first feature values indicating certain characteristics of the first image, referring to map information indicating correspondences between coordinate information indicating coordinates of defined positions included in a movement area of the autonomous device and second feature values, which are calculated from second images and indicate certain characteristics of the second images and identifying, by referring to the map information, a second position corresponding to second feature values having at least a predetermined degree of correspondence to the feature values generating a command for moving the autonomous device to the second position on the basis of coordinate information corresponding to the second position, and transmitting the command to the autonomous device.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: October 8, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Tomonori Nakamura, Koji Asai, Katsushige Amano
  • Patent number: 9922552
    Abstract: A first control apparatus receives a device control log of a second control apparatus, and stores a shared log that results from adding the received device control log of the second control apparatus to a device control log of the first control apparatus. Upon acquiring a control request from a user to control the device, the first control apparatus determines based on the shared log whether the device is ready for control. If the device is determined to be ready, the first control apparatus transmits to the device a control command responsive to the acquired control request.
    Type: Grant
    Filed: April 2, 2016
    Date of Patent: March 20, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Katsushige Amano, Tomonori Nakamura
  • Publication number: 20170277196
    Abstract: A method for controlling an autonomous device that moves in two dimensions using a controller includes obtaining a first image at a first position, which is a destination of the autonomous device, calculating, from the first image, first feature values indicating certain characteristics of the first image, referring to map information indicating correspondences between coordinate information indicating coordinates of defined positions included in a movement area of the autonomous device and second feature values, which are calculated from second images and indicate certain characteristics of the second images and identifying, by referring to the map information, a second position corresponding to second feature values having at least a predetermined degree of correspondence to the feature values generating a command for moving the autonomous device to the second position on the basis of coordinate information corresponding to the second position, and transmitting the command to the autonomous device.
    Type: Application
    Filed: March 17, 2017
    Publication date: September 28, 2017
    Inventors: TOMONORI NAKAMURA, KOJI ASAI, KATSUSHIGE AMANO
  • Publication number: 20160307440
    Abstract: A first control apparatus receives a device control log of a second control apparatus, and stores a shared log that results from adding the received device control log of the second control apparatus to a device control log of the first control apparatus. Upon acquiring a control request from a user to control the device, the first control apparatus determines based on the shared log whether the device is ready for control. If the device is determined to be ready, the first control apparatus transmits to the device a control command responsive to the acquired control request.
    Type: Application
    Filed: April 2, 2016
    Publication date: October 20, 2016
    Inventors: KATSUSHIGE AMANO, TOMONORI NAKAMURA
  • Patent number: 9460270
    Abstract: When a predetermined application program becomes the target of execution on a virtual machine that is currently being executed, the virtual machine that is currently being executed is designated as a parent virtual machine, and a child virtual machine to execute the predetermined application program is generated by forking. The generated child virtual machine is configured not to execute any application program other than the predetermined application program. The parent virtual machine executes a dummy application program instead of the predetermined application program.
    Type: Grant
    Filed: February 21, 2012
    Date of Patent: October 4, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Katsushige Amano, Masahiko Saito
  • Patent number: 9460276
    Abstract: A virtual machine system that restricts use of confidential information only to the case where an authentication has resulted in success. The virtual machine system includes first virtual machine, second virtual machine, and hypervisor. The first virtual machine includes: storage unit storing confidential information; and authentication unit configured to perform authentication and notify the hypervisor of result of the authentication. The second virtual machine uses virtual device that is virtualized storage device. When having received authentication result indicating authentication success from the authentication unit, the hypervisor enables the second virtual machine to access, as substance of the virtual device, storage area storing the confidential information, and when not having received the authentication result indicating the authentication success from the authentication unit, the hypervisor disables the second virtual machine from accessing the storage area storing the confidential information.
    Type: Grant
    Filed: February 20, 2013
    Date of Patent: October 4, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Tadao Tanikawa, Masahiko Saito, Katsushige Amano, Toshiaki Takeuchi
  • Patent number: 9170832
    Abstract: A virtual machine control apparatus 100 controls execution of a first type virtual machine A210 and a second type virtual machine 220. The first type virtual machine A210 includes a start detection unit 261 which detects an operation in the first type virtual machine A210 to start usage of a device (external storage device 160). The first type virtual machine A210 also includes a start signal output unit 262 which outputs a start signal when the start detection unit 261 detects the operation to start usage of the device. The second type virtual machine 220 includes a control unit (external storage device driver 272) which, when the start signal output unit 262 outputs the start signal while the device is in set in a low power mode (electrical power set to off), sets the device in a normal mode (electrical power set to on).
    Type: Grant
    Filed: January 25, 2013
    Date of Patent: October 27, 2015
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Katsushige Amano, Masahiko Saito, Tadao Tanikawa, Takuya Kondoh, Toshiaki Takeuchi
  • Patent number: 9069589
    Abstract: The present invention relates to a virtual machine system that includes a plurality of processors and executes a plurality of virtual machines in parallel with use of the plurality of processors. An aim thereof is to suppress power consumption without sacrificing the performance of the virtual machine system. When there are at least two processors that do not have any virtual machines allocated thereto, one of the at least two processors is supplied with power so as to be placed in a standby state, and a remaining one or more of the at least two processors are not supplied with power.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: June 30, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Masahiko Saito, Ryota Miyazaki, Tadao Tanikawa, Katsushige Amano, Masashi Sugiyama
  • Patent number: 9032401
    Abstract: When a process judging unit judges that a target process is a protected process, a key judging unit judges whether a target key that is a key generated by a key generating unit is a first key or a second key. When the key judging unit judges that the target key is the first key, a VM communication managing unit notifies the target process of a memory ID of a protected memory region corresponding to the first key. When the process judging unit judges that the target process is an unprotected process, a key transforming unit transforms the target key from the first key to the second key based on the key transformation rule. An HV communication managing unit notifies the target process of a memory ID of an unprotected memory region corresponding to the second key.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: May 12, 2015
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Teruo Kamiyama, Katsushige Amano, Masahiko Saito, Tadao Tanikawa
  • Patent number: 8819680
    Abstract: A computer system enables two virtual machines with use of two virtual CPUs. The computer system includes a CPU that is allocated to the virtual CPU when the virtual CPU performs computer processing of the virtual machine other than timer processing; a tick CPU that is dedicated to timer processing and is allocated to the virtual CPU upon receiving an interrupt request (tick interrupt) for causing the virtual CPU to perform timer processing of the virtual machine; and interrupt controller that issues the tick interrupt to the tick CPU.
    Type: Grant
    Filed: June 9, 2011
    Date of Patent: August 26, 2014
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Tadao Tanikawa, Katsushige Amano
  • Publication number: 20140196034
    Abstract: A virtual machine control apparatus 100 controls execution of a first type virtual machine A210 and a second type virtual machine 220. The first type virtual machine A210 includes a start detection unit 261 which detects an operation in the first type virtual machine A210 to start usage of a device (external storage device 160). The first type virtual machine A210 also includes a start signal output unit 262 which outputs a start signal when the start detection unit 261 detects the operation to start usage of the device. The second type virtual machine 220 includes a control unit (external storage device driver 272) which, when the start signal output unit 262 outputs the start signal while the device is in set in a low power mode (electrical power set to off), sets the device in a normal mode (electrical power set to on).
    Type: Application
    Filed: January 25, 2013
    Publication date: July 10, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Katsushige Amano, Masahiko Saito, Tadao Tanikawa, Takuya Kondoh, Toshiaki Takeuchi
  • Patent number: 8719834
    Abstract: An information processing system that maintains balance in the processing loads between processors and that includes operating systems, which each perform execution control on processing tasks by assigning each task to a task group and causing all tasks in the same task group to be executed on the same processor, and a hypervisor that associates each processor with one or more task groups in the operating systems and causes each operating system to perform the execution control so that all tasks in the same task group are executed on the processor associated with the same task group. The hypervisor sequentially acquires load indicators indicating a processing load of each task group in each operating system, refers to the processing loads indicated by the sequentially acquired load indicators, and when determining that the processing loads are not balanced between the processors, re-associates the processors with the task groups.
    Type: Grant
    Filed: April 20, 2011
    Date of Patent: May 6, 2014
    Assignee: Panasonic Corporation
    Inventor: Katsushige Amano
  • Patent number: 8694760
    Abstract: A branch prediction mechanism within an information processing device comprises a call stack where function arguments are stacked when function calls are performed. The call stack stores arguments relating to branch instructions within the function. The branch prediction mechanism stores the branch instruction address, the leading value of the call stack, and the branch destination address at branch instruction execution time, which are in correspondence, in a branch result buffer. A branch prediction unit obtains the branch instruction address and leading value of the call stack when notified of branch instruction execution, searches the branch result buffer for a branch destination corresponding to the address and leading value, and predicts the search result as the branch destination of the executed branch instruction. An instruction fetch unit fetches instructions from the branch destination predicted by the branch prediction unit.
    Type: Grant
    Filed: May 19, 2010
    Date of Patent: April 8, 2014
    Assignee: Panasonic Corporation
    Inventor: Katsushige Amano
  • Publication number: 20140020086
    Abstract: A virtual machine system that restricts use of confidential information only to the case where an authentication has resulted in success. The virtual machine system includes first virtual machine, second virtual machine, and hypervisor. The first virtual machine includes: storage unit storing confidential information; and authentication unit configured to perform authentication and notify the hypervisor of result of the authentication. The second virtual machine uses virtual device that is virtualized storage device. When having received authentication result indicating authentication success from the authentication unit, the hypervisor enables the second virtual machine to access, as substance of the virtual device, storage area storing the confidential information, and when not having received the authentication result indicating the authentication success from the authentication unit, the hypervisor disables the second virtual machine from accessing the storage area storing the confidential information.
    Type: Application
    Filed: February 20, 2013
    Publication date: January 16, 2014
    Applicant: Panasonic Corporation
    Inventors: Tadao Tanikawa, Masahiko Saito, Katsushige Amano, Toshiaki Takeuchi
  • Patent number: 8504752
    Abstract: The interrupt level storing unit (16) stores one or more interrupt levels indicating the priority of a generated interrupt and stores the interrupt level having the highest priority among the stored interrupt levels as a second interrupt mask level. The second interrupt type determination unit (13) sets an interrupt level corresponding to the interrupt type of a newly generated interrupt. The priority determination unit (14) notifies the interrupt to the virtual machine control unit (20) when the interrupt level of the newly generated interrupt is higher than the stored second interrupt mask level. As a result, the priority of the virtual machine can be determined according to the task priority and the switching of virtual machines can be adequately controlled even if the virtual machines cannot notify the task priority.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: August 6, 2013
    Assignee: Panasonic Corporation
    Inventors: Katsuhiro Arinobu, Tadao Tanikawa, Katsushige Amano
  • Publication number: 20130117745
    Abstract: When a process judging unit 109 judges that a target process is a protected process 101, a key judging unit 111 judges whether a target key that is a key generated by a key generating unit 108 is a first key or a second key. When the key judging unit 111 judges that the target key is the first key, a VM communication managing unit 112 notifies the target process of a memory ID of a protected memory region 121 corresponding to the first key. When the process judging unit 109 judges that the target process is an unprotected process, a key transforming unit 110 transforms the target key from the first key to the second key based on the key transformation rule. An HV communication managing unit 105 notifies the target process of a memory ID of an unprotected memory region 122 corresponding to the second key.
    Type: Application
    Filed: March 30, 2012
    Publication date: May 9, 2013
    Inventors: Teruo Kamiyama, Katsushige Amano, Masahiko Saito, Tadao Tanikawa
  • Publication number: 20130097603
    Abstract: When a predetermined application program becomes the target of execution on a virtual machine that is currently being executed, the virtual machine that is currently being executed is designated as a parent virtual machine, and a child virtual machine to execute the predetermined application program is generated by forking. The generated child virtual machine is configured not to execute any application program other than the predetermined application program. The parent virtual machine executes a dummy application program instead of the predetermined application program.
    Type: Application
    Filed: February 21, 2012
    Publication date: April 18, 2013
    Inventors: Katsushige Amano, Masahiko Saito
  • Publication number: 20130081016
    Abstract: The present invention relates to a virtual machine system that includes a plurality of processors and executes a plurality of virtual machines in parallel with use of the plurality of processors. An aim thereof is to suppress power consumption without sacrificing the performance of the virtual machine system. When there are at least two processors that do not have any virtual machines allocated thereto, one of the at least two processors is supplied with power so as to be placed in a standby state, and a remaining one or more of the at least two processors are not supplied with power.
    Type: Application
    Filed: June 27, 2011
    Publication date: March 28, 2013
    Inventors: Masahiko Saito, Ryota Miyazaki, Tadao Tanikawa, Katsushige Amano, Masashi Sugiyama
  • Patent number: 8374842
    Abstract: An access monitoring section (11) obtains access information including an address conforming to an address stored in a monitoring address setting section (10) from an access signal output from a CPU (1) to a peripheral device (3). An access judging section (13) compares the access information received from the access monitoring section (11) and the last access information stored in an access storing section (12), and stores the obtained access information in the access storing section (12) and requests the transmission of an exception generation notification to an exception generating section (14) when the received access information is different from the last access information while excluding the last access information stored in the access storing section (12) from access information to be compared when the received access information is the same as the last access information. By this construction, throughput can be reduced at the time of emulation and the peripheral device can be efficiently emulated.
    Type: Grant
    Filed: May 20, 2009
    Date of Patent: February 12, 2013
    Assignee: Panasonic Corporation
    Inventors: Katsushige Amano, Tadao Tanikawa
  • Publication number: 20120174098
    Abstract: A computer system enables two virtual machines 110 and 111 with use of two virtual CPUs 143 and 144. The computer system includes: CPU 103 that is allocated to the virtual CPU 143 when the virtual CPU 143 performs computer processing of the virtual machine 110 other than timer processing; tick CPU 105 that is dedicated to timer processing and is allocated to the virtual CPU 143 upon receiving an interrupt request (tick interrupt) for causing the virtual CPU 103 to perform timer processing of the virtual machine 110; and interrupt controller 106 that issues the tick interrupt to the tick CPU 105.
    Type: Application
    Filed: June 9, 2011
    Publication date: July 5, 2012
    Inventors: Tadao Tanikawa, Katsushige Amano