Patents by Inventor Katsushige Asada
Katsushige Asada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11703967Abstract: A display panel includes a common electrode formed in an upper layer above a data line, a first insulating layer covering the common electrode, a touch sensor line formed in an upper layer of the first insulating layer and in a first opening provided in the first insulating layer, and connected to the common electrode via the first opening, a second insulating layer covering the touch sensor line, and a pixel electrode formed in an upper layer of the second insulating layer. The first insulating layer is formed with a second opening between the common electrode and the pixel electrode. The second insulating layer is disposed in an interior of the second opening and formed with a recessed portion recessed downward into a portion above the second opening. At least a portion of the pixel electrode is disposed in the recessed portion of the second insulating layer.Type: GrantFiled: January 5, 2022Date of Patent: July 18, 2023Assignee: SHARP DISPLAY TECHNOLOGY CORPORATIONInventors: Katsushige Asada, Hajime Imai, Yoshihito Hara, Akihiro Shohraku, Isao Ogasawara, Yuki Yamashita
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Publication number: 20220236820Abstract: A display panel includes a common electrode formed in an upper layer above a data line, a first insulating layer covering the common electrode, a touch sensor line formed in an upper layer of the first insulating layer and in a first opening provided in the first insulating layer, and connected to the common electrode via the first opening, a second insulating layer covering the touch sensor line, and a pixel electrode formed in an upper layer of the second insulating layer. The first insulating layer is formed with a second opening between the common electrode and the pixel electrode. The second insulating layer is disposed in an interior of the second opening and formed with a recessed portion recessed downward into a portion above the second opening. At least a portion of the pixel electrode is disposed in the recessed portion of the second insulating layer.Type: ApplicationFiled: January 5, 2022Publication date: July 28, 2022Inventors: Katsushige ASADA, Hajime IMAI, Yoshihito HARA, Akihiro SHOHRAKU, Isao OGASAWARA, Yuki YAMASHITA
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Patent number: 9405160Abstract: An active matrix substrate includes a plurality of pixel electrodes arranged in a matrix; and a source wiring running in a column direction, wherein the source wiring includes a first side portion running along one side in a column direction of at least one pixel electrode of the plurality of pixel electrodes, a crossing portion running across the pixel electrode, and a second side portion running along another side in the column direction of the pixel electrode, the first side portion and the second side portion are connected to each other via the crossing portion, and at least one crossing portion is provided on each of at least two pixel electrodes aligned in the column direction out of the plurality of pixel electrodes.Type: GrantFiled: January 25, 2011Date of Patent: August 2, 2016Assignee: Sharp Kabushiki KaishaInventors: Hironobu Sawada, Junichi Morinaga, Kuniko Maeno, Katsushige Asada, Katsuhiro Mikumo, Tetsuya Fujikawa
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Patent number: 9268183Abstract: At least either a first substrate or a second substrate has regions corresponding to subpixels (15a, 15b, 15c) and provided with ribs (100a) for controlling how a liquid crystal material is aligned. Scanning signal lines (32) and picture element electrodes (60) are overlapped with each other via an insulating material as seen in plan view. The ribs (100a) and the scanning signal lines (32) are at least partially overlapped with each other as seen in plan view.Type: GrantFiled: December 3, 2008Date of Patent: February 23, 2016Assignee: SHARP KABUSHIKI KAISHAInventors: Katsushige Asada, Masahiro Yoshida, Masakatsu Tominaga, Tetsuya Fujikawa, Junichi Morinaga, Toshiaki Fujihara
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Patent number: 9001294Abstract: A liquid crystal display panel includes a color filter substrate with four or more color layers of different colors and a light shielding layer, each pixel including a repeating unit composed of the four or more color layers overlap overlapping the light shielding layer, the liquid crystal display panel having a region where color layers of the same color in different pixels are arranged in the same rows or the same columns, and a color layer of a color with higher brightness overlaps a portion of the light shielding layer positioned between the color layer and another color layer of the same color with an overlapping width smaller than that with which a color layer of a color with lower brightness overlaps a portion of the light shielding layer positioned between the color layer and another color layer of the same color.Type: GrantFiled: November 1, 2011Date of Patent: April 7, 2015Assignee: Sharp Kabushiki KaishaInventors: Ryohki Itoh, Yuhko Hisada, Junichi Morinaga, Hironobu Sawada, Katsushige Asada
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Publication number: 20140347614Abstract: This liquid crystal display device (100) includes: a first substrate (10) including a pixel electrode (11); a second substrate (20) including a counter electrode (21); and a vertical alignment liquid crystal layer (30). At least one liquid crystal domain with axisymmetric alignment is produced when a voltage is applied between the pixel electrode and the counter electrode in each pixel. The second substrate further includes an alignment controlling projection which induces liquid crystal molecules (31) in the liquid crystal domain to get aligned axisymmetrically and a plurality of columnar spacers (24), which includes a first columnar spacer (24m) and a second columnar spacer (24s) which is lower than the first columnar spacer. The pixel electrode has a length of 35 ?m or less as measured along its shorter sides. In at least some of the pixels, the second columnar spacer functions as the alignment controlling projection.Type: ApplicationFiled: January 11, 2013Publication date: November 27, 2014Inventors: Katsushige Asada, Manabu Sawasaki, Junichi Morinaga, Masayuki Yamanaka
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Publication number: 20140192308Abstract: The present invention provides a liquid crystal display that suppresses defects caused by variation in process and improves display performance.Type: ApplicationFiled: August 3, 2012Publication date: July 10, 2014Applicant: SHARP KABUSHIKI KAISHAInventors: Tomoo Furukawa, Yuhko Hisada, Katsushige Asada
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Publication number: 20140176891Abstract: The present invention provides a liquid crystal display panel which facilitates laser repair for repairing defects even if an electrode facing a pixel electrode with an insulating film therebetween is a transparent electrode. The liquid crystal display panel of the present invention includes a first substrate having an insulating substrate, a thin film transistor, a scan signal line, a first light-shielding electrode, a first insulating film, a second light-shielding electrode, a second insulating film, a transparent electrode, a third insulating film, and a pixel electrode; a second substrate having an insulating substrate; and a liquid crystal layer sandwiched between the first substrate and the second substrate. The second light-shielding electrode is located between the thin film transistor and the pixel electrode and connected to the pixel electrode through a connecting portion formed through the second insulating film and the third insulating film.Type: ApplicationFiled: August 3, 2012Publication date: June 26, 2014Applicant: SHARP KABUSHIKI KAISHAInventors: Yuhko Hisada, Katsushige Asada, Tetsuya Fujikawa, Akihiro Shohraku, Yuki Yamashita
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Patent number: 8743305Abstract: A liquid crystal display device in which lengths (d1 and1 d2) of respective picture element electrodes (60) in an extended direction of scanning signal lines (32) are longer than lengths (d3) of the respective picture element electrodes (60) in an extended direction of video signal lines (35) is arranged such that storage capacitor lines (36) are provided along the respective scanning signal lines (32) so as to overlap the respective picture element electrodes (60) via an insulating film (70) in plan view.Type: GrantFiled: December 1, 2008Date of Patent: June 3, 2014Assignee: Sharp Kabushiki KaishaInventors: Masahiro Yoshida, Satoshi Horiuchi, Masakatsu Tominaga, Junichi Morinaga, Ryohki Itoh, Katsushige Asada, Hironobu Sawada, Hitoshi Matsumoto
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Publication number: 20130222746Abstract: The present invention relates to a liquid crystal display panel which can prevents roughness of the displayed image and reduction in the contrast ratio accompanying a use of four or more color filters of different colors.Type: ApplicationFiled: November 1, 2011Publication date: August 29, 2013Applicant: SHARP KABUSHIKI KAISHAInventors: Ryohki Itoh, Yuhko Hisada, Junichi Morinaga, Hironobu Sawada, Katsushige Asada
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Publication number: 20130222747Abstract: The present invention provides a display panel capable of suppressing display unevenness caused by the capacitance change due to misalignment when four primary colors are used. The display panel of the present invention includes: signal lines; pixel electrodes; and a common electrode. In the display panel, a single pixel is constituted by picture elements of four or more colors. Each of the pixel electrodes is connected to each one of the signal lines. The pixel electrodes, which are included in the single pixel, are arranged in a squared shape, and include a pixel electrode having larger area and a pixel electrode having smaller area. Both of a signal line connected to the pixel electrode having the larger area and a signal line connected to the pixel electrode having the smaller area overlap with the pixel electrode having the larger area.Type: ApplicationFiled: November 1, 2011Publication date: August 29, 2013Applicant: SHARP KABUSHIKI KAISHAInventors: Yuhko Hisada, Hironobu Sawada, Junichi Morinaga, Katsushige Asada, Ryohki Itoh
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Publication number: 20130088681Abstract: An object of the present invention is to provide a display panel and a display device which are able to sufficiently increase the luminance, and to suppress the occurrence of difference in response speed, transmissivity, and viewing angle characteristics, and the like for each color, and which are also able to improve the yield in the manufacturing process, and are able to be applied to various display modes, such as a CPA mode, an MVA mode, and an IPS mode.Type: ApplicationFiled: May 24, 2011Publication date: April 11, 2013Inventors: Yuhko Hisada, Hironobu Sawada, Junichi Morinaga, Katsushige Asada
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Publication number: 20130070002Abstract: The present invention is to provide a display panel and a display device in each of which the white luminance and/or the color reproduction range are/is sufficiently improved by changing the sub-pixel area for each color, so that unevenness of luminance is sufficiently suppressed, and the influence of line width variation on the aperture ratio is reduced. The display panel according to the present invention includes a pair of substrates, a display element sandwiched between the pair of substrates, and pixels each formed by sub-pixels of four or more colors, and is featured in that one of the pair of substrates includes scanning lines, signal lines, and sub-pixel electrodes, and in that the area of at least one of the sub-pixels of four or more colors is different from the area of the other sub-pixels, and the sub-pixel having the larger area overlaps with a plurality of the signal lines in plan view of the main surface of the display panel.Type: ApplicationFiled: May 24, 2011Publication date: March 21, 2013Inventors: Yuhko Hisada, Hironobu Sawada, Junichi Morinaga, Katsushige Asada
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Patent number: 8400597Abstract: Each of picture elements (14) has a plurality of alignment regions (R1, R2, R3, and R4), in each of which liquid crystal molecules contained in a liquid crystal layer are aligned in a direction that is different from those in the others of the plurality of alignment regions. Each of a plurality of scanning signal lines (32) and a border region (R11 and R12) between corresponding adjacent ones of the plurality of alignment regions (R1, R2, R3, and R4) at least partially overlap each other when viewed from above.Type: GrantFiled: March 27, 2009Date of Patent: March 19, 2013Assignee: Sharp Kabushiki KaishaInventors: Junichi Morinaga, Katsushige Asada, Masahiro Yoshida, Tetsuya Fujikawa, Katsuhiro Mikumo, Kuniko Maeno, Ryohki Itoh, Satoshi Horiuchi, Tatsuji Saitoh, Isao Ogasawara, Kazunori Tanimoto, Katsuhiro Okada, Toshiaki Fujihara, Masakatsu Tominaga
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Publication number: 20130038807Abstract: The present invention provides an active matrix substrate that enables to suppress variation in the pixel potential even if an alignment shift is present. The active matrix substrate of the present invention includes a plurality of pixel electrodes arranged in a matrix; and a source wiring running in a column direction, wherein the source wiring has a first side portion running along one side in a column direction of at least one pixel electrode of the plurality of pixel electrodes, a crossing portion running across the pixel electrode, and a second side portion running along another side in the column direction of the pixel electrode, the first side portion and the second side portion are connected to each other via the crossing portion, and at least one crossing portion is provided on each of at least two pixel electrodes aligned in the column direction out of the plurality of pixel electrodes.Type: ApplicationFiled: January 25, 2011Publication date: February 14, 2013Inventors: Hironobu Sawada, Junichi Morinaga, Kuniko Maeno, Katsushige Asada, Katsuhiro Mikumo, Tetsuya Fujikawa
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Publication number: 20110075087Abstract: Each of picture elements (14) has a plurality of alignment regions (R1, R2, R3, and R4), in each of which liquid crystal molecules contained in a liquid crystal layer are aligned in a direction that is different from those in the others of the plurality of alignment regions. Each of a plurality of scanning signal lines (32) and a border region (R11 and R12) between corresponding adjacent ones of the plurality of alignment regions (R1, R2, R3, and R4) at least partially overlap each other when viewed from above.Type: ApplicationFiled: March 27, 2009Publication date: March 31, 2011Inventors: Junichi Morinaga, Katsushige Asada, Masahiro Yoshida, Tetsuya Fujikawa, Katsuhiro Mikumo, Kuniko Maeno, Ryohki Itoh, Satoshi Horiuchi, Tatsuji Saitoh, Isao Ogasawara, Kazunori Tanimoto, Katsuhiro Okada, Toshiaki Fujihara, Masakatsu Tominaga
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Publication number: 20100328558Abstract: At least either a first substrate or a second substrate has regions corresponding to subpixels (15a, 15b, 15c) and provided with ribs (100a) for controlling how a liquid crystal material is aligned. Scanning signal lines (32) and picture element electrodes (60) are overlapped with each other via an insulating material as seen in plan view. The ribs (100a) and the scanning signal lines (32) are at least partially overlapped with each other as seen in plan view.Type: ApplicationFiled: December 3, 2008Publication date: December 30, 2010Inventors: Katsushige Asada, Masahiro Yoshida, Masakatsu Tominaga, Tetsuya Fujikawa, Junichi Morinaga, Toshiaki Fujihara
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Publication number: 20100296017Abstract: A liquid crystal display device in which lengths (d1 and d2) of respective picture element electrodes (60) in an extended direction of scanning signal lines (32) are longer than lengths (d3) of the respective picture element electrodes (60) in an extended direction of video signal lines (35) is arranged such that storage capacitor lines (36) are provided along the respective scanning signal lines (32) so as to overlap the respective picture element electrodes (60) via an insulating film (70) in plan view.Type: ApplicationFiled: December 1, 2008Publication date: November 25, 2010Inventors: Masahiro Yoshida, Satoshi Horiuchi, Masakatsu Tominaga, Junichi Morinaga, Ryohki Itoh, Katsushige Asada, Hironobu Sawada, Hitoshi Matsumoto
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Patent number: 7187423Abstract: It is an object of the invention to provide a display and a method for repairing defects of the same in which defects such as inter-layer short-circuits and short-circuits in a single that have occurred at steps for manufacturing the display can be easily repaired to provide a good product with a probability higher than that in the related art. Laser irradiation is carried out as a first cycle of laser irradiation by forming a slit S1 in a region where a drain bus line 220 completely covers a gate bus line 218 to form a cut portion longer than the width of the gate bus line 218 adjacent to an inter-layer short-circuit 290 such that it splits an intersecting portion of the drain bus line 220 into two parts as shown in FIG. 5b. Next, as shown in FIG. 5c, slits S2 and S3 are respectively used for second and third cycles of laser irradiation to cut the drain bus line 220 at both ends of the cut portion (indicated by S1), thereby isolating the inter-layer short-circuit 290 of the drain bus line 220.Type: GrantFiled: October 19, 2004Date of Patent: March 6, 2007Assignee: Sharp Kabushiki KaishaInventors: Kiyoshi Ozaki, Tsuyoshi Kamada, Kunio Matsubara, Shinya Katoh, Yoshihisa Taguchi, Katsushige Asada, Shogo Hayashi
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Publication number: 20050078235Abstract: It is an object of the invention to provide a display and a method for repairing defects of the same in which defects such as inter-layer short-circuits and short-circuits in a single that have occurred at steps for manufacturing the display can be easily repaired to provide a good product with a probability higher than that in the related art. Laser irradiation is carried out as a first cycle of laser irradiation by forming a slit S1 in a region where a drain bus line 220 completely covers a gate bus line 218 to form a cut portion longer than the width of the gate bus line 218 adjacent to an inter-layer short-circuit 290 such that it splits an intersecting portion of the drain bus line 220 into two parts as shown in FIG. 5b. Next, as shown in FIG. 5c, slits S2 and S3 are respectively used for second and third cycles of laser irradiation to cut the drain bus line 220 at both ends of the cut portion (indicated by S1), thereby isolating the inter-layer short-circuit 290 of the drain bus line 220.Type: ApplicationFiled: October 19, 2004Publication date: April 14, 2005Applicant: FUJITSU DISPLAY TECHNOLOGIES CORPORATIONInventors: Kiyoshi Ozaki, Tsuyoshi Kamada, Kunio Matsubara, Shinya Katoh, Yoshihisa Taguchi, Katsushige Asada, Shogo Hayashi