Patents by Inventor Katsuto Tanahashi

Katsuto Tanahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7906443
    Abstract: A wafer processing method is provided that includes the steps of heating a silicon wafer containing oxygen and irradiating an infrared ray having a wavelength within a range of 7-25 ?m on the silicon wafer, and controlling formation of oxygen precipitates within the silicon wafer by selectively setting a heating temperature for heating the silicon wafer and an irradiation intensity of the infrared ray.
    Type: Grant
    Filed: May 26, 2006
    Date of Patent: March 15, 2011
    Assignee: Fujitsu Limited
    Inventors: Katsuto Tanahashi, Hiroshi Kaneta
  • Patent number: 7648887
    Abstract: A classification apparatus for the semiconductor substrate is provided with a bow measuring section which accepts silicon substrates and measures respective bows thereof. The classification apparatus is also provided with a bow judging section which, based on one or more standard value(s) set in advance, checks a measurement result by the bow measuring section against the standard value(s). The bow judging section judges to which of ranges defined based on the standard value(s) of the bow the measurement result by the bow measuring section belongs. Further, the classification apparatus is provided with a sorting section which accepts the silicon substrate having been measured by the bow measuring section and sorts the accepted silicon substrates based on the judgment results by the bow judging section. In other words, silicon substrates are grouped according to the bows by the sorting section. Then, respective silicon substrates are discharged in a grouped state.
    Type: Grant
    Filed: October 23, 2006
    Date of Patent: January 19, 2010
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Toshiya Sato, Katsuto Tanahashi
  • Publication number: 20070231934
    Abstract: A classification apparatus for the semiconductor substrate is provided with a bow measuring section which accepts silicon substrates and measures respective bows thereof. The classification apparatus is also provided with a bow judging section which, based on one or more standard value(s) set in advance, checks a measurement result by the bow measuring section against the standard value(s). The bow judging section judges to which of ranges defined based on the standard value(s) of the bow the measurement result by the bow measuring section belongs. Further, the classification apparatus is provided with a sorting section which accepts the silicon substrate having been measured by the bow measuring section and sorts the accepted silicon substrates based on the judgment results by the bow judging section. In other words, silicon substrates are grouped according to the bows by the sorting section. Then, respective silicon substrates are discharged in a grouped state.
    Type: Application
    Filed: October 23, 2006
    Publication date: October 4, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Toshiya Sato, Katsuto Tanahashi
  • Publication number: 20070190809
    Abstract: A wafer processing method is provided that includes the steps of heating a silicon wafer containing oxygen and irradiating an infrared ray having a wavelength within a range of 7-25 ?m on the silicon wafer, and controlling formation of oxygen precipitates within the silicon wafer by selectively setting a heating temperature for heating the silicon wafer and an irradiation intensity of the infrared ray.
    Type: Application
    Filed: May 26, 2006
    Publication date: August 16, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Katsuto Tanahashi, Hiroshi Kaneta
  • Publication number: 20040135208
    Abstract: A semiconductor substrate of the present invention is a DSP wafer or Semi-DSP wafer (FIG. 2) having a flatness of an SFQR value ≦70 (nm) and containing boron at a concentration not lower than 5×1016 (atoms/cm3) nor higher than 2×1017 (atoms/cm3) within 95% or more of rectangular regions of 25×8 (mm2) arranged on a front face of the substrate. Specifically, a silicon crystal layer by an epitaxial growth is formed on a front face of a silicon substrate having the above substrate boron concentration.
    Type: Application
    Filed: December 24, 2003
    Publication date: July 15, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Katsuto Tanahashi, Hiroshi Kaneta, Tetsuo Fukuda