Abstract: An information processing system includes: a first information processing apparatus; and a second information processing apparatus, the first information processing apparatus includes: a computation processing device that executes a first computation; a main storage device that stores data; and a control device that controls transfer of data among the first and second information processing apparatuses, the control device includes: a computation processor that executes a second computation; a buffer that holds data used in the second computation that the computation processor executes; and a transfer controller that controls transfer of data from the main storage device to the buffer and transfer of data from a different main storage device in the second information processing apparatus to the buffer, and controls transfer of result data of the second computation to the main storage device and transfer of the result data of the second computation to the different main storage device.

Abstract: A first component receives packets from a second component. When setting content related to a physical layer of a transmission path between the first component and the second component is reinitialized, the first component transmits identification information to the second component. This identification information identifies a packet to be received when packet transmission suspended due to the reinitialization is restarted. The second component transmits a packet to the first component and receives the identification information from the first component. After the reinitialization has been completed and before the packet transmission is restarted, the second component performs control such that the packet transmission is restarted in accordance with the identification information.

Abstract: According to an aspect of an embodiment, an apparatus has a first storage, a read write unit for reading and writing data from/into the first storage, a first error detector for detecting an error of data read out from the first storage, an address storage for storing an address of the first storage, a determining unit for determining whether an address of the first storage in which data to be written is matched with the error detected address, a second storage for storing data to be written into the first storage when the address of the first storage in which the data to be written is matched with the error detected address, a second error detector for detecting an error of data read out from the second storage and a selector for outputting one of the data stored in the first storage or the second storage.

Abstract: According to an aspect of an embodiment, an apparatus has a first storage, a read write unit for reading and writing data from/into the first storage, a first error detector for detecting an error of data read out from the first storage, an address storage for storing an address of the first storage, a determining unit for determining whether an address of the first storage in which data to be written is matched with the error detected address, a second storage for storing data to be written into the first storage when the address of the first storage in which the data to be written is matched with the error detected address, a second error detector for detecting an error of data read out from the second storage and a selector for outputting one of the data stored in the first storage or the second storage.

Abstract: The present invention permits mounting and optimization of a hierarchically necessary number of units corresponding to the scale of input/output subsystems. An input/output subsystem is organized by dividing it into a basic portion including power units and an expanded portion including one or more input/output units. Each of the input/output subsystems has a plurality of built-in magnetic disk modules. The enclosure of a subsystem are composed of a basic enclosure mounting thereon power units and a prescribed number of input/output units forming a basic portion, and an expanded enclosure mounting thereon remaining input/output units other than those mounted on the basic enclosure. The power unit automatically recognizes the mounting status of input/output units, and ensures a necessary power supply capacity.