Abstract: A power circuit configured to supply an operating voltage to a memory controller configured to control a flash memory and an access to the flash memory, comprises an input side charging unit that is a charging unit configured to be charged by an input voltage that is supplied from the outside, a voltage regulation unit configured to regulate any higher one of the input voltage and a charging voltage of the input side charging unit to be the operating voltage and to output the voltage, an output side charging unit that is a charging unit configured to be charged by the operating voltage, and a discharging unit configured to discharge electricity that has been charged to the output side charging unit in the case in which any higher one of the input voltage and the charging voltage becomes lower than the setting value.

Abstract: A power circuit configured to supply an operating voltage to a memory controller configured to control a flash memory and an access to the flash memory, comprises an input side charging unit that is a charging unit configured to be charged by an input voltage that is supplied from the outside, a voltage regulation unit configured to regulate any higher one of the input voltage and a charging voltage of the input side charging unit to be the operating voltage and to output the voltage, an output side charging unit that is a charging unit configured to be charged by the operating voltage, and a discharging unit configured to discharge electricity that has been charged to the output side charging unit in the case in which any higher one of the input voltage and the charging voltage becomes lower than the setting value.

Abstract: A system controller exchanges data with a memory controller. The system controller includes an interpreting unit, a first instruction data supplying unit, a second instruction data supplying unit, and a controlling unit. The second instruction data supplying unit transfers the first operation instruction data provided from a host system to the memory controller. If the interpreting unit interprets the first operation instruction data as data instructing to begin an operation with the second instruction data supplying unit, the controlling unit shifts to a first mode that halts the first instruction data supplying unit and that begins an operation with the second instruction data supplying unit.

Abstract: A system controller exchanges data with a memory controller. The system controller includes an interpreting unit, a first instruction data supplying unit, a second instruction data supplying unit, and a controlling unit. The second instruction data supplying unit transfers the first operation instruction data provided from a host system to the memory controller. If the interpreting unit interprets the first operation instruction data as data instructing to begin an operation with the second instruction data supplying unit, the controlling unit shifts to a first mode that halts the first instruction data supplying unit and that begins an operation with the second instruction data supplying unit.