Abstract: Polarity patterns (polarity pattern signal POL) are stored in a ROM in a polarity pattern controlling portion. Then, the polarity pattern is changed according to applications of a liquid crystal display panel. Since the polarity pattern is stored in the ROM, the polarity pattern can be changed without modification of a hardware. Also, two sets of polarity patterns or more are stored in the ROM, and then any one polarity pattern can be output according to the application. In addition, the polarity pattern signal POL and image signals RGB are compared with each other, and then the polarity pattern which is to be read from the ROM is switched according to the result.

Abstract: A drive control circuit supplies a gate voltage so that display quality is not degraded even in a case where a vertical scanning frequency or a horizontal scanning frequency is changed. The circuit includes a timing controller for detecting a change of a horizontal scanning frequency, a gate voltage generating circuit for generating two kinds of gate-on voltages Va and Vb (Va<Vb), and a switch for outputting one of the gate-on voltages Va and Vb from the gate voltage generating circuit in accordance with an output of the timing controller. The timing controller includes a counter for counting the number of clocks for one horizontal period, and a comparator for comparing a count result with a threshold value. When the horizontal scanning frequency is in a normal state, the low gate-on voltage Va is outputted, and when the horizontal scanning frequency exceeds a predetermined threshold value, that is, the count value falls below a threshold value, the high gate-on voltage Vb is outputted.

Abstract: Polarity patterns (polarity pattern signal POL) are stored in a ROM in a polarity pattern controlling portion. Then, the polarity pattern is changed according to applications of a liquid crystal display panel. Since the polarity pattern is stored in the ROM, the polarity pattern can be changed without modification of a hardware. Also, two sets of polarity patterns or more are stored in the ROM, and then any one polarity pattern can be output according to the application. In addition, the polarity pattern signal POL and image signals RGB are compared with each other, and then the polarity pattern which is to be read from the ROM is switched according to the result.

Abstract: It is the object to provide a liquid crystal display to prevent adverse effects by crosstalk and/or EMI. A liquid crystal display, which has a transistor board having a plurality of transistors each including a gate, a source and a drain, a common board including a common electrode and provided to oppose the aforesaid transistor board via liquid crystal, a gate driver for driving the gates of a plurality of transistors, and a source driver with a plurality of source driver units being cascaded, for driving the sources of a plurality of transistors, is provided. Each of the source driver units has flip-flops operated in synchronism with a clock signal, and inverters for inverting the clock signal to output it to the source driver unit in a next stage.

Abstract: A circuit for driving a liquid crystal display panel includes a plurality of output circuits that are coupled to respective data bus lines of the liquid crystal display panel, and output liquid crystal drive signals to the respective data bus lines with respective delays that progressively increase from a first one of the data bus lines to a last one of the data bus lines.

Abstract: There is provided a display device and method which is capable of securing the optimum operation thereof irrespective of an external clock signal. An input circuit receives image data input thereto. First to N-th (N≧2) storage circuits store image data input via the input circuit such that the image data is divided into respective N regions. First to M-th (M≧N) driving circuits drive respective regions M of at least part of the display block formed by dividing the at least part of the display block. An image data supply circuit reads out image data stored in each of the first to N-th storage circuits and supplies the image data to a corresponding one of the driving circuits. A clock signal generation circuit generates a clock signal for enabling image data to be read out from the first to N-th storage circuits and be supplied to the first to M-th driving circuits, in synchronism therewith.

Abstract: Since the drive data for display or their correction values are stored in correspondence with the combination of the upper bits of the current frame image data and the upper bits of the previous frame image data, the capacity of the high-speed memory circuit that stores the conversion table can be reduced. Accompanying the reduction in the capacity of the conversion table, since the precision of the display drive data or their correction values becomes lower, an interpolation circuit is provided and, by means of an interpolation calculation the display, drive data or their correction values having increased precision is generated and consequently the input image data is corrected to generate the display drive data.

Abstract: A liquid crystal display apparatus includes a liquid crystal display unit, a plurality of data driving units which provide image data to said liquid crystal display unit, and a control unit which enables said plurality of data driving units to take in the image data simultaneously if the image data to be provided to said data driving units are identical.