Patents by Inventor Katsuyoshi Mase

Katsuyoshi Mase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7224799
    Abstract: When inserting several types of digital watermark information into the digital information, the visual time stamp detection circuit extracts the time stamps corresponding to the visual data in the visual data stream and the digital watermark insertion circuit specifies the types of the digital watermark information to be inserted corresponding to the extracted time stamps and inserts the digital watermark information of the applicable types into the visual data so that such information is synthesized with the audio data by the mixer circuit.
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: May 29, 2007
    Assignee: NEC Corporation
    Inventor: Katsuyoshi Mase
  • Patent number: 6965642
    Abstract: A moving image data compressor/decompressor is provided that compresses moving image data with high compressibility and high image quality maintained. The image data extractor 8 extracts image data on a partial area with large motion in a frame. The first data compressor 10 compresses the image data on the partial area. The image reducer 12 reduces the size of the frame. The second data compressor compresses the data concerning the size-reduced frame. The compressed data output unit 16 holds data groups sequentially into the hard disk 208, together with positional information on a partial area. Each of the data groups is formed of frame data compressed by the second data compressor 14 and image data on a partial area compressed by the first data compressor 10, for each frame forming a moving image.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: November 15, 2005
    Assignee: NEC Corporation
    Inventor: Katsuyoshi Mase
  • Publication number: 20020051263
    Abstract: A moving image data compressor/decompressor is provided that compresses moving image data with high compressibility and high image quality maintained. The image data extractor 8 extracts image data on a partial area with large motion in a frame. The first data compressor 10 compresses the image data on the partial area. The image reducer 12 reduces the size of the frame. The second data compressor compresses the data concerning the size-reduced frame. The compressed data output unit 16 holds data groups sequentially into the hard disk 208, together with positional information on a partial area. Each of the data groups is formed of frame data compressed by the second data compressor 14 and image data on a partial area compressed by the first data compressor 10, for each frame forming a moving image.
    Type: Application
    Filed: October 30, 2001
    Publication date: May 2, 2002
    Applicant: NEC CORPORATION
    Inventor: Katsuyoshi Mase
  • Publication number: 20010047478
    Abstract: When inserting several types of digital watermark information into the digital information, the visual time stamp detection circuit extracts the time stamps corresponding to the visual data in the visual data stream and the digital watermark insertion circuit specifies the types of the digital watermark information to be inserted corresponding to the extracted time stamps and inserts the digital watermark information of the applicable types into the visual data so that such information is synthesized with the audio data by the mixer circuit.
    Type: Application
    Filed: May 25, 2001
    Publication date: November 29, 2001
    Applicant: NEC Corporation
    Inventor: Katsuyoshi Mase
  • Patent number: 6072367
    Abstract: An electronic balance adjusting circuit comprises a register for holding a balance data and capable of changing the balance data held in the register, a first ALU receiving the balance data held in the register for outputting a first digital value corresponding to a first ratio, and a second ALU receiving the balance data held in the register for outputting a second digital value corresponding to a second ratio having such an inverse increase/decrease relation to the first ratio that when the first ratio increases, the second ratio decreases and when the first ratio decreases, the second ratio increases. A first digital-to-analog converter receives the first digital value to output a first analog signal indicative of the first ratio, and a second digital-to-analog converter receives the second digital value to output a second analog signal indicative of the second ratio.
    Type: Grant
    Filed: December 10, 1998
    Date of Patent: June 6, 2000
    Assignee: NEC Corporation
    Inventor: Katsuyoshi Mase
  • Patent number: 4587438
    Abstract: A turn-off circuit for GTOs has a three-phase, full-wave rectifier. The output voltage of the three-phase, full-wave rectifier is applied as a turn-off power source to a charge/discharge capacitor.
    Type: Grant
    Filed: January 6, 1984
    Date of Patent: May 6, 1986
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Koichi Murakami, Katsuyoshi Mase