Patents by Inventor Katsuyuki Fukudome

Katsuyuki Fukudome has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8097942
    Abstract: A semiconductor device and a manufacturing method therefor wherein a wire for coupling an inner lead and a semiconductor chip with each other can be prevented from being electrically short-circuited to any other conductive part are provided. An inner lead portion has a tip arranged outside the outer circumferential end of the semiconductor chip as viewed on a plane. A power supply bar has a jutted portion extended between the outer circumferential end of the semiconductor chip and the tip of the inner lead portion as viewed on a plane. The upper face of the jutted portion is in a position lower than the upper face of the tip of the inner lead portion. A bonding wire for electrically coupling the semiconductor chip and the inner lead portion with each other has a bent portion outside the outer circumferential end of the semiconductor chip as viewed on a plane.
    Type: Grant
    Filed: May 11, 2009
    Date of Patent: January 17, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Kazuyuki Misumi, Katsuyuki Fukudome, Kazushi Hatauchi, Kazuya Fukuhara, Kunihiro Yamashita
  • Patent number: 7763966
    Abstract: A plurality of inner leads 14 are provided around a die pad 13. A grounded GND lead 16 is provided in a region between the die pad 13 and the plurality of inner leads 14. A semiconductor chip 17 and the plurality of inner leads 14 are connected to each other by a plurality of wires 21. The semiconductor chip 17 and the GND lead 16 are connected to each other by GND wires 22. The GND wires 22 are disposed between a plurality of wires 21. The distance between ends of each adjacent pair of the inner leads 14 is 0.2 mm or less.
    Type: Grant
    Filed: March 5, 2008
    Date of Patent: July 27, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Kazuyuki Misumi, Kazushi Hatauchi, Yasuki Takata, Naoya Yasuda, Hideyuki Arakawa, Katsuyuki Fukudome
  • Publication number: 20100001386
    Abstract: A semiconductor device and a manufacturing method therefor wherein a wire for coupling an inner lead and a semiconductor chip with each other can be prevented from being electrically short-circuited to any other conductive part are provided. An inner lead portion has a tip arranged outside the outer circumferential end of the semiconductor chip as viewed on a plane. A power supply bar has a jutted portion extended between the outer circumferential end of the semiconductor chip and the tip of the inner lead portion as viewed on a plane. The upper face of the jutted portion is in a position lower than the upper face of the tip of the inner lead portion. A bonding wire for electrically coupling the semiconductor chip and the inner lead portion with each other has a bent portion outside the outer circumferential end of the semiconductor chip as viewed on a plane.
    Type: Application
    Filed: May 11, 2009
    Publication date: January 7, 2010
    Inventors: Kazuyuki Misumi, Katsuyuki Fukudome, Kazushi Hatauchi, Kazuya Fukuhara, Kunihiro Yamashita
  • Publication number: 20080217750
    Abstract: A plurality of inner leads 14 are provided around a die pad 13. A grounded GND lead 16 is provided in a region between the die pad 13 and the plurality of inner leads 14. A semiconductor chip 17 and the plurality of inner leads 14 are connected to each other by a plurality of wires 21. The semiconductor chip 17 and the GND lead 16 are connected to each other by GND wires 22. The GND wires 22 are disposed between a plurality of wires 21. The distance between ends of each adjacent pair of the inner leads 14 is 0.2 mm or less.
    Type: Application
    Filed: March 5, 2008
    Publication date: September 11, 2008
    Inventors: Kazuyuki Misumi, Kazushi Hatauchi, Yasuki Takata, Naoya Yasuda, Hideyuki Arakawa, Katsuyuki Fukudome
  • Patent number: 4942454
    Abstract: A resin-sealed semiconductor device comprises a die pad which has through holes. Thin metal films are provided on the surfaces of the die pad except for the wall surfaces of the holes. A resin, which is used for integral molding of the die pad and a semiconductor element, flows into the holes during molding. The semiconductor device so mounted does not induce cracks in the resin and, thus, has good moisture resistance.
    Type: Grant
    Filed: August 2, 1988
    Date of Patent: July 17, 1990
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Ryuichiro Mori, Katsuyuki Fukudome, Tatsuhiko Akiyama, Yoshitaka Takemoto
  • Patent number: 4884124
    Abstract: A semiconductor device comprises a semiconductor element which is bonded to a flat base and encapsulated in a resin. The base has a bonding section at its center to which the semiconductor element is bonded, the area of the bonding section being smaller than that of the bottom surface of the semiconductor element. The portion of the base outside the bonding section has a plurality of through holes or depressions formed in its top and bottom surfaces which increase the adhesion between the resin and the base. The bonding section may be substantially separated from the remainder of the base by elongated through holes or depressions which substantially surround the bonding section.
    Type: Grant
    Filed: August 17, 1987
    Date of Patent: November 28, 1989
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Ryuichiro Mori, Tatsuhiko Akiyama, Katsuyuki Fukudome
  • Patent number: 4857989
    Abstract: A semiconductor element mounting member which is a mounting portion of a lead frame is provided with a concave portion having a smaller area than that of the lower surface of a semiconductor element, the area being less than 4.times.4 mm.sup.2. The concave portion is filled with a bonding material, and the semiconductor element and the semiconductor element mounting member are bonded by the bonding material.
    Type: Grant
    Filed: September 4, 1987
    Date of Patent: August 15, 1989
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Ryuichiro Mori, Katsuyuki Fukudome, Toshinobu Banjo