Patents by Inventor Katsuyuki Hironaka

Katsuyuki Hironaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100295037
    Abstract: Disclosed herein is a thin film transistor including: a semiconductor layer including an amorphous oxide, and a source electrode and a drain electrode which are provided in contact with the semiconductor layer. The source electrode and the drain electrode are formed by use of iridium or iridium oxide.
    Type: Application
    Filed: March 29, 2010
    Publication date: November 25, 2010
    Applicant: Sony Corporation
    Inventor: Katsuyuki Hironaka
  • Patent number: 7306751
    Abstract: Crystalline superfine particles capable of emitting light depending upon a time-rate-of-change of a stress and controlled in grain size in the range from 5 nm to 100 nm are complexed with another material such as resin. The crystalline superfine particles are manufactured by using aggregates of molecules, i.e. inverted micelles, which orient hydrophilic groups of surfactant molecules inward and hydrophobic groups outward in a nonpolar solvent and which contain metal ions of a metal for forming the crystalline superfine particles dissolved in water inside the inverted micelles. Alternatively, they are manufactured by using inverted micelles enveloping precursor superfine particles, in which precursor superfine particles are enveloped in water inside the inverted micelles. The crystalline superfine particles are excellent in dispersibility in another material to be complexed, enhanced in emission efficiency and usable to make a transparent stress emission material.
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: December 11, 2007
    Assignee: Sony Corporation
    Inventors: Hiroki Naito, Yuichi Ishida, Masayuki Suzuki, Keiko Furukawa, Katsuyuki Hironaka
  • Publication number: 20070042181
    Abstract: Crystalline superfine particles capable of emitting light depending upon a time-rate-of-change of a stress and controlled in grain size in the range from 5 nm to 100 nm are complexed with another material such as resin. The crystalline superfine particles are manufactured by using aggregates of molecules, i.e. inverted micelles, which orient hydrophilic groups of surfactant molecules inward and hydrophobic groups outward in a nonpolar solvent and which contain metal ions of a metal for forming the crystalline superfine particles dissolved in water inside the inverted micelles. Alternatively, they are manufactured by using inverted micelles enveloping precursor superfine particles, in which precursor superfine particles are enveloped in water inside the inverted micelles. The crystalline superfine particles are excellent in dispersibility in another material to be complexed, enhanced in emission efficiency and usable to make a transparent stress emission material.
    Type: Application
    Filed: October 27, 2006
    Publication date: February 22, 2007
    Applicant: Sony Corporation
    Inventors: Hiroki Naito, Yuichi Ishida, Masayuki Suzuki, Keiko Furukawa, Katsuyuki Hironaka
  • Patent number: 7160614
    Abstract: Crystalline superfine particles capable of emitting light depending upon a time-rate-of-change of a stress and controlled in grain size in the range from 5 nm to 100 nm are complexed with another material such as resin. The crystalline superfine particles are manufactured by using aggregates of molecules, i.e. inverted micelles, which orient hydrophilic groups of surfactant molecules inward and hydrophobic groups outward in a nonpolar solvent and which contain metal ions of a metal for forming the crystalline superfine particles dissolved in water inside the inverted micelles. Alternatively, they are manufactured by using inverted micelles enveloping precursor superfine particles, in which precursor superfine particles are enveloped in water inside the inverted micelles. The crystalline superfine particles are excellent in dispersibility in another material to be complexed, enhanced in emission efficiency and usable to make a transparent stress emission material.
    Type: Grant
    Filed: October 28, 2003
    Date of Patent: January 9, 2007
    Assignee: Sony Corporation
    Inventors: Hiroki Naito, Yuichi Ishida, Masayuki Suzuki, Keiko Furukawa, Katsuyuki Hironaka
  • Publication number: 20060257661
    Abstract: Crystalline superfine particles capable of emitting light depending upon a time-rate-of-change of a stress and controlled in grain size in the range from 5 nm to 100 nm are complexed with another material such as resin. The crystalline superfine particles are manufactured by using aggregates of molecules, i.e. inverted micelles, which orient hydrophilic groups of surfactant molecules inward and hydrophobic groups outward in a nonpolar solvent and which contain metal ions of a metal for forming the crystalline superfine particles dissolved in water inside the inverted micelles. Alternatively, they are manufactured by using inverted micelles enveloping precursor superfine particles, in which precursor superfine particles are enveloped in water inside the inverted micelles. The crystalline superfine particles are excellent in dispersibility in another material to be complexed, enhanced in emission efficiency and usable to make a transparent stress emission material.
    Type: Application
    Filed: July 21, 2006
    Publication date: November 16, 2006
    Applicant: Sony Corporation
    Inventors: Hiroki Naito, Yuichi Ishida, Masayuki Suzuki, Keiko Furukawa, Katsuyuki Hironaka
  • Patent number: 6995069
    Abstract: In a method for manufacturing a semiconductor storage device having a dielectric capacitor, an IrO2 film, an Ir film, an amorphous film, and a Pt film—are sequentially made on an Si substrate. The SBT film may comprise Bix, Sry, Ta2.0 and Oz, where the atomic ratio may be within the range of 0?Sr/Ti?1.0, 0?Ba/Ti?1.0. The Pt film, the amorphous film, the Ir film, and the IrO2 film formed into a dielectric capacitor and the amorphous film is twice annealed to change its amorphous phase to a fluorite phase and then to a crystal phase of a perovskite type crystalline structure and thereby obtain the SBT film. The process may include a lower electrode made from an organic metal source material selected from a group consisting of Bi(C6H5)3, Bi(o-C7H7)3, Bi(O—C2H5)3, Bi(O—iC3H7)3, Bi(O-tC4H9)3, Bi(O-tC5H11)3, Sr(THD)2, Sr(THD)2 tetraglyme, Sr(Me5C5)2. 2THF, Ti(i-OC3H7)4, TiO(THD)2, Ti(TD)2(i-OC3H7)2, Ta(i-OC3H7)5, Ta(iOC3H7)4THD, Nb(i-OC3H7)5, Nb(i-OC3H7)4THD.
    Type: Grant
    Filed: October 3, 2002
    Date of Patent: February 7, 2006
    Assignee: Sony Corporation
    Inventors: Katsuyuki Hironaka, Masataka Sugiyama, Chiharu Isobe, Takaaki Ami
  • Publication number: 20040191518
    Abstract: Crystalline superfine particles capable of emitting light depending upon a time-rate-of-change of a stress and controlled in grain size in the range from 5 nm to 100 nm are complexed with another material such as resin. The crystalline superfine particles are manufactured by using aggregates of molecules, i.e. inverted micelles, which orient hydrophilic groups of surfactant molecules inward and hydrophobic groups outward in a nonpolar solvent and which contain metal ions of a metal for forming the crystalline superfine particles dissolved in water inside the inverted micelles. Alternatively, they are manufactured by using inverted micelles enveloping precursor superfine particles, in which precursor superfine particles are enveloped in water inside the inverted micelles. The crystalline superfine particles are excellent in dispersibility in another material to be complexed, enhanced in emission efficiency and usable to make a transparent stress emission material.
    Type: Application
    Filed: October 28, 2003
    Publication date: September 30, 2004
    Applicant: Sony Corporation
    Inventors: Hiroki Naito, Yuichi Ishida, Masayuki Suzuki, Keiko Furukawa, Katsuyuki Hironaka
  • Patent number: 6544857
    Abstract: In a process for manufacturing a dielectric capacitor, an IrO2 film, an Ir film, an amorphous film, and a Pt film-are sequentially made on a Si substrate. The SBT film may comprise BixSryTa2.0Oz, where the atomic composition ratio maybe within the range of 0≦Sr/Ti≦1.0, 0≦Ba/Ti≦1.0. The Pt film, the amorphous film, the Ir film, and the IrO2 film formed into a dielectric capacitor and the amorphous film is annealed to change its amorphous phase to a crystal phase of a perovskite type crystalline structure and thereby obtain the SBT film. The process may include a lower electrode made from an organic metal source material selected from a group consisting of Bi(C6H5)3, Bi(o-C7H7)3, Bi(O-C2H5)3, Bi(O-iC3H7)3, Bi(O- tC4H9)3, Bi(O-tC5H11)3, Sr(THD)2, Sr(THD)2 tetraglyme, Sr(Me5C5)2·2THF, Ti(i-OC3H7)4, TiO(THD)2, Ti(THD)2(i-OC3H7)2, Ta(i-OC3H7)5, Ta(iOC3H7)4THD, Nb(i-OC3H7)5, Nb(i- OC3H7)4THD.
    Type: Grant
    Filed: March 4, 1999
    Date of Patent: April 8, 2003
    Assignee: Sony Corporation
    Inventors: Katsuyuki Hironaka, Masataka Sugiyama, Chiharu Isobe, Takaaki Ami
  • Publication number: 20030036243
    Abstract: In a process for manufacturing a dielectric capacitor using a SBT film as its dielectric film, an IrO2 film 2, Ir film 3, both making up a lower electrode, an amorphous film 4 as a precursor film of the SBT film, and a Pt film 5 as an upper electrode are sequentially made on a Si substrate 5. Then, the Pt film 5, amorphous film 4, Ir film 3 and IrO2 film 2 are patterned into the form of the dielectric capacitor, and the amorphous film 4 is annealed to change the amorphous phase in the amorphous film 4 to a crystal phase of a perovskite type crystalline structure and thereby obtain the SBT film 6. Therefore, even when the decrease in area of dielectric capacitors progresses, a dielectric capacitor with good characteristics can be realized, and a semiconductor storage device using a dielectric capacitor having good characteristics can be obtained.
    Type: Application
    Filed: October 3, 2002
    Publication date: February 20, 2003
    Inventors: Katsuyuki Hironaka, Masataka Sugiyama, Chiharu Isobe, Takaaki Ami
  • Patent number: 6251360
    Abstract: A method of producing a bismuth layered compound that includes the steps of providing a substrate, dissolving Bi, Sr and Ta containing compounds in an organic solvent to form a solution having a Bi:Sr:Ta volume ratio of 2:1:2, evaporating the solution and depositing the evaporated solution onto the substrate, heating the substrate to form a thin film having a fluorite structure, and heating the thin film in an oxidizing atmosphere to convert the thin film having a fluorite structure to a thin film comprising Bi2SrTa2O9.
    Type: Grant
    Filed: August 9, 1999
    Date of Patent: June 26, 2001
    Assignee: Sony Corporation
    Inventors: Takaaki Ami, Katsuyuki Hironaka, Chiharu Isobe, Yuji Ikeda
  • Patent number: 6114199
    Abstract: A ferroelectric thin film is subjected to heat treatment in an active oxygen atmosphere containing an oxidizing gas such as ozone, N.sub.2 O, or NO.sub.2, thereby preventing occurrence of oxygen defects (oxygen vacancies) in the thin film, and avoiding a deterioration in dielectric characteristics, ferroelectric characteristics, and electric characteristics required for the ferroelectric thin film, such as a reduction in permittivity, an increase in leakage current, a reduction in remanent polarization, and an increase in coercive electric field. Thus, the ferroelectric thin film having stable characteristics can be formed. Further, a nonvolatile memory cell using this ferroelectric thin film as a capacitor is formed.
    Type: Grant
    Filed: August 28, 1996
    Date of Patent: September 5, 2000
    Assignee: Sony Corporation
    Inventors: Chiharu Isobe, Masataka Sugiyama, Katsuyuki Hironaka, Takaaki Ami, Christian Gutleben
  • Patent number: 6043561
    Abstract: It is intended to provide an electronic material which permits not only PZT but also SBT requiring high-temperature annealing to be used as the material of a dielectric film of a dielectric capacitor in vertical alignment with a transistor so as to connect the lower electrode of the dielectric capacitor to a diffusion layer of the transistor with a Si or W plug; its manufacturing method; and a ferroelectric capacitor and nonvolatile memory. There is also provided a semiconductor device permitting greater freedom in selecting the process temperature and time in a later step subsequent to formation of the plug. Used as the material of the lower electrode of the dielectric capacitor is a material expressed by the composition formula Pd.sub.a (Rh.sub.100-x-y-z Pt.sub.x Ir.sub.y Ru.sub.z).sub.b O.sub.c where a, b, c, x, y and z are composition ratios in atomic %) in which the composition ratios satisfy 70.gtoreq.a.gtoreq.20, 40.gtoreq.b.gtoreq.10, 60.gtoreq.c.gtoreq.15, a+b+c=100, 100>x.gtoreq.0, 100>y.
    Type: Grant
    Filed: April 24, 1998
    Date of Patent: March 28, 2000
    Assignee: Sony Corporation
    Inventors: Kenji Katori, Katsuyuki Hironaka, Koji Watanabe
  • Patent number: 6004392
    Abstract: Described are a stable semiconductor memory device which is not susceptible to the influence of a heat treatment temperature of a semiconductor substrate of reaction pressure in the CVD method and is free from the reduction in remanence caused by data writing in repetition; and a fabrication process of such a device which comprises forming, by the CVD method, a ferroelectric film containing as a component element bismuth, suing a bismuth alkoxide compound as a raw material, and using the ferroelectric film as a film for the formation of storage capacitance for a semiconductor memory device.
    Type: Grant
    Filed: September 6, 1996
    Date of Patent: December 21, 1999
    Assignee: Sony Corporation
    Inventors: Chiharu Isobe, Masataka Sugiyama, Katsuyuki Hironaka, Takaaki Ami
  • Patent number: 5976624
    Abstract: The formation of an electrically conductive phase in an dielectric or ferroelectric composed of a bismuth compound is inhibited. Described is a process for producing a bismuth compound, which comprises introducing a gas of starting materials in an atmosphere under a pressure of 0.01 to 50 torr, depositing a precursor of a bismuth compound on a substrate, and thermally treating it in an oxidizing atmosphere.
    Type: Grant
    Filed: August 20, 1996
    Date of Patent: November 2, 1999
    Assignee: Sony Corporation
    Inventors: Takaaki Ami, Katsuyuki Hironaka, Yuji Ikeda
  • Patent number: 5935549
    Abstract: A process is disclosed for making a bismuth layered compound, such as Bi.sub.2 SrTa.sub.2 O.sub.9, by forming mixture of Bi.sub.2 O.sub.3, Ta.sub.2 O.sub.5 and a compound selected from strontium hydroxide or strontium nitrate, grinding the mixture, shaping the ground mixture at elevated temperature and pressure to form a pellet of bismuth strontium tantalum oxide having a fluorite structure and then heating the pellet in a flow of oxygen at 800-1000.degree. C. until a single phase bismuth layered compound is obtained.
    Type: Grant
    Filed: March 26, 1996
    Date of Patent: August 10, 1999
    Assignee: Sony Corporation
    Inventors: Takaaki Ami, Katsuyuki Hironaka, Chiharu Isobe, Yuji Ikeda
  • Patent number: 5904766
    Abstract: Provided is a process for preparing a bismuth compound at a heat treatment temperature lower than conventional. A bismuth compound is prepared by the steps of heating under vacuum to form a reduced phase and heating under oxidizing environment of normal or lower pressure.
    Type: Grant
    Filed: October 17, 1996
    Date of Patent: May 18, 1999
    Assignee: Sony Corporation
    Inventors: Takaaki Ami, Katsuyuki Hironaka, Koji Watanabe, Akio Machida