Abstract: An image processing device is configured to generate a three-dimensional bird's eye view image by projecting captured images acquired from a plurality of imaging devices onto a three-dimensional projection surface, and includes: an acquiring part configured to acquire position information of a first area, on which an object is to be placed, in a three-dimensional space; a conversion part configured to convert the position information of the first area into position information in accordance with the three-dimensional projection surface; and an output part configured to output the three-dimensional bird's eye view image, on which the object is to be placed on a second area in the three-dimensional space, the second area being specified by the converted position information. By this means, when the three-dimensional bird's eye view image is generated from multiple images, it is possible to display the object naturally in the three-dimensional bird's eye view image.

Abstract: A semiconductor device according to one embodiment of the present disclosure includes a substrate, a plurality of structures arranged in a matrix and each having a planar part, and a plurality of piezoelectric actuators disposed on the substrate and configured to move each of the plurality of structures along a direction perpendicular to one surface of the substrate.

Abstract: The present invention provides a sewing machine shuttle that allows, prior to the application of an upward-pulling force from a take-up lever and without the use of this upper-pulling force, an upper thread to be pulled from an internal shuttle while sliding through the abutment between a rotation stopping recess portion and a rotation stopping projection; prevents thread breakage and inconsistency in thread tension by avoiding resistance from the upper thread when the upward-pulling force of the take-up lever is applied; and stabilizes the action of the upper thread after it has been pulled from the inner shuttle.

Abstract: A pneumatic radial tire has a tire meridian cross-sectional configuration of a tread surface portion on at least one side of the tire center line which is arranged such that, when a position A is an intersection of the tire center line and the tread surface, and when a position B is an intersection of a straight line P drawn orthogonal to the tire axis from an edge of an innermost belt layer and the tread surface, an angle &agr; between a straight line X connecting the positions A and B and a straight line Y drawn perpendicular to the tire center line from the position A is set in a range of 8 to 10 degrees, when the pneumatic radial tire is attached to a standard rim specified in JATMA with its air pressure being 180 kPa and with no load applied thereto.

Abstract: The present invention provides a sewing machine shuttle that allows, prior to the application of an upward-pulling force from a take-up lever and without the use of this upper-pulling force, an upper thread to be pulled from an internal shuttle while sliding through the abutment between a rotation stopping recess portion and a rotation stopping projection; prevents thread breakage and inconsistency in thread tension by avoiding resistance from the upper thread when the upward-pulling force of the take-up lever is applied; and stabilizes the action of the upper thread after it has been pulled from the inner shuttle.

Abstract: A pneumatic radial tire has a tire meridian cross-sectional configuration of a tread surface portion on at least one side of the tire center line which is arranged such that, when a position A is an intersection of the tire center line and the tread surface, and when a position B is an intersection of a straight line P drawn orthogonal to the tire axis from an edge of an innermost belt layer and the tread surface, an angle &agr; between a straight line X connecting the positions A and B and a straight line Y drawn perpendicular to the tire center line from the position A is set in a range of 8 to 10 degrees, when the pneumatic radial tire is attached to a standard rim specified in JATMA with its air pressure being 180 kPa and with no load applied thereto.

Abstract: A high-resistance polycrystalline Si resistor having a stable resistance value even when micro-sized and a low-resistance polycrystalline Si resistor having a sufficiently low desired resistance value wherein a polycrystalline Si film is formed on an insulation film located on a Si substrate, high-resistance-making ion implantation is applied to the entire surface and medium-resistance-making ion implantation is selectively applied to a medium-resistance-making region of the polycrystalline Si film. Low-resistance-making ion implantation is selectively applied to a low-resistance-making region of the polycrystalline Si film. The product is annealed to grow the polycrystalline Si film by solid-phase growth, the film is patterned to form a high-resistance polycrystalline Si resistor, medium-resistance polycrystalline Si resistor, and low-resistance polycrystalline Si resistor.

Abstract: A high-resistance polycrystalline Si resistor having a stable resistance value even when micro-sized and a low-resistance polycrystalline Si resistor having a sufficiently low desired resistance value wherein a polycrystalline Si film is formed on an insulation film located on a Si substrate, high-resistance-making ion implantation is applied to the entire surface and medium-resistance-making ion implantation is selectively applied to a medium-resistance-making region of the polycrystalline Si film. Low-resistance-making ion implantation is selectively applied to a low-resistance-making region of the polycrystalline Si film. The product is annealed to grow the polycrystalline Si film by solid-phase growth, the film is patterned to form a high-resistance polycrystalline Si resistor, medium-resistance polycrystalline Si resistor, and low-resistance polycrystalline Si resistor.

Abstract: A semiconductor device and a manufacturing method therefor which can simultaneously realize both a reduction in base transit time by a reduction in base width and a reduction in base resistance by a reduction in link base resistance. The semiconductor device is manufactured by the method including the steps of forming a first impurity diffused layer of a first conduction type in a semiconductor substrate; forming a conducting film connected to the first impurity diffused layer; forming a first insulating film on the conducting film; forming a first hole through a laminated film composed of the first insulating film and the conducting film; forming a second impurity diffused layer of the first conduction type in the semiconductor substrate exposed to the first hole; forming a side wall from a second insulating film in the first hole to form a second hole; and forming a third impurity diffused layer of the first conduction type in the semiconductor substrate exposed to the second hole.

Abstract: A lateral bipolar transistor capable of forming a narrow-sized diffusion region, such as a base width, is disclosed. The transistor exhibits no scattering in the direction of the depth of the width of the diffusion region. Emitter resistance is reduced by varying an impurity diffusion source at substantially a uniform concentration in a semiconductor portion and forming a diffusion region by diffusion from the impurity diffusion source. The bipolar transistor has an SOI structure. A method of making such device is also disclosed.

Abstract: A lateral bipolar transistor capable of forming a narrow-sized diffusion region, such as a base width, is disclosed. The transistor exhibits no scattering in the direction of the depth of the width of the diffusion region. Emitter resistance is reduced by varying an impurity diffusion source at substantially a uniform concentration in a semiconductor portion and forming a diffusion region by diffusion from the impurity diffusion source. The bipolar transistor has an SOI structure. A method of making such device is also disclosed.

Abstract: A method of manufacturing semiconductor interconnection includes the steps of providing a bottom conductive layer having an auxiliary conductive layer applied on top of the bottom conductive layer. The auxiliary conductive layer is patterned and subsequently a further conductive layer is applied over the patterned auxiliary conductive layer. A mask is then applied over the further conductive layer to form a pillar connection which provides a reliable connection in a semiconductor device.

Abstract: A semiconductor device and a manufacturing method therefor which can simultaneously realize both a reduction in base transit time by a reduction in base width and a reduction in base resistance by a reduction in link base resistance. The semiconductor device is manufactured by the method including the steps of forming a first impurity diffused layer of a first conduction type in a semiconductor substrate; forming a conducting film connected to the first impurity diffused layer; forming a first insulating film on the conducting film; forming a first hole through a laminated film composed of the first insulating film and the conducting film; forming a second impurity diffused layer of the first conduction type in the semiconductor substrate exposed to the first hole; forming a side wall from a second insulating film in the first hole to form a second hole; and forming a third impurity diffused layer of the first conduction type in the semiconductor substrate exposed to the second hole.

Abstract: A lateral bipolar transistor capable of forming a narrow-sized diffusion region, such as a base width, is disclosed. The transistor exhibits no scattering in the direction of the depth of the width of the diffusion region. Emitter resistance is reduced by varying an impurity diffusion source at substantially a uniform concentration in a semiconductor portion and forming a diffusion region by diffusion from the impurity diffusion source. The bipolar transistor has an SOI structure. A method of making such device is also disclosed.

Abstract: A lateral bipolar transistor capable of forming a narrow-sized diffusion region, such as a base width, is disclosed. The transistor exhibits no scattering in the direction of the depth of the width of the diffusion region. Emitter resistance is reduced by varying an impurity diffusion source at substantially a uniform concentration in a semiconductor portion and forming a diffusion region by diffusion from the impurity diffusion source. The bipolar transistor has an SOI structure. A method of making such device is also disclosed.

Abstract: A semiconductor device of a multilayer wiring structure provided with a bottom conductive layer and a top conductive layer connected through a pillar connection portion, wherein the bottom conductive layer has a pattern determined by the sum of the pattern of the auxiliary conductive layer formed on the bottom conductive layer and the pattern of the pillar connection portion.

Abstract: A lateral bipolar transistor capable of forming a narrow-sized diffusion region, such as a base width, is disclosed. The transistor exhibits no scattering in the direction of the depth of the width of the diffusion region. Emitter resistance is reduced by varying an impurity diffusion source at substantially a uniform concentration in a semiconductor portion and forming a diffusion region by diffusion from the impurity diffusion source. The bipolar transistor has an SOI structure. A method of making such device is also disclosed.

Abstract: A semiconductor device and a manufacturing method therefor which can simultaneously realize both a reduction in base transit time by a reduction in base width and a reduction in base resistance by a reduction in link base resistance. The semiconductor device is manufactured by the method including the steps of forming a first impurity diffused layer of a first conduction type in a semiconductor substrate; forming a conducting film connected to the first impurity diffused layer; forming a first insulating film on the conducting film; forming a first hole through a laminated film composed of the first insulating film and the conducting film; forming a second impurity diffused layer of the first conduction type in the semiconductor substrate exposed to the first hole; forming a side wall from a second insulating film in the first hole to form a second hole; and forming a third impurity diffused layer of the first conduction type in the semiconductor substrate exposed to the second hole.

Abstract: A method by which when a long label tape is cut at a number of cut marks made thereon into a number of labels, the cut marks can be reliably confirmed. The long label tape is advanced in its longitudinal direction, a cut mark is confirmed, and the tape is cut at the cut mark. The cut mark is confirmed by a combination of a first step of confirming that a front side margin of the cut mark arrives at a detecting position and a subsequent second confirmation step of confirming that the cut mark arrives at the detecting position.