Patents by Inventor Katsuyuki Yasukouchi

Katsuyuki Yasukouchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11909364
    Abstract: Embodiments of the present disclosure provide a chopper amplifier circuit that includes an operational amplifier, and a notch filter to be operated by a chopping pulse. The notch filter has a first branch that has a first capacitor, and a second branch that has a second capacitor. A chopping delay switch is connected to the first branch and the second branch of the notch filter. A control circuit is to close the chopping delay switch to short-circuit the first branch and the second branch of the notch filter to each other. The control circuit is to detect establishment of feedback signal at the chopper amplifier. The control circuit is to open the chopping delay switch, responsive to detecting establishment of the feedback signal at the chopper amplifier.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: February 20, 2024
    Assignee: Cypress Semiconductor Corporation
    Inventor: Katsuyuki Yasukouchi
  • Publication number: 20220385250
    Abstract: Embodiments of the present disclosure provide a chopper amplifier circuit that includes an operational amplifier, and a notch filter to be operated by a chopping pulse. The notch filter has a first branch that has a first capacitor, and a second branch that has a second capacitor. A chopping delay switch is connected to the first branch and the second branch of the notch filter. A control circuit is to close the chopping delay switch to short-circuit the first branch and the second branch of the notch filter to each other. The control circuit is to detect establishment of feedback signal at the chopper amplifier. The control circuit is to open the chopping delay switch, responsive to detecting establishment of the feedback signal at the chopper amplifier.
    Type: Application
    Filed: May 25, 2021
    Publication date: December 1, 2022
    Applicant: Cypress Semiconductor Corporation
    Inventor: Katsuyuki Yasukouchi
  • Patent number: 9325239
    Abstract: A power supply device that includes a switch circuit to which an input voltage is supplied, a coil coupled between the switch circuit and an output terminal from which an output voltage is outputted. A voltage adding circuit adds a slope voltage to a reference voltage. A control unit compares a feedback voltage corresponding to the output voltage and the reference voltage and switches the switch circuit at a timing corresponding to a comparison result of the feedback voltage and the reference voltage. A slope adjustment circuit differentiates a current flowing in the coil and adjusts a slope amount of the slope based on a differentiation result of the current.
    Type: Grant
    Filed: November 1, 2013
    Date of Patent: April 26, 2016
    Assignee: Cypress Semiconductor Corporation
    Inventors: Shinichiro Suga, Kenta Ido, Tomohiro Suzuki, Hiroaki Sumiya, Katsuyuki Yasukouchi, Takahiro Yoshino
  • Publication number: 20140055108
    Abstract: A power supply device that includes a switch circuit to which an input voltage is supplied, a coil coupled between the switch circuit and an output terminal from which an output voltage is outputted. A voltage adding circuit adds a slope voltage to a reference voltage. A control unit compares a feedback voltage corresponding to the output voltage and the reference voltage and switches the switch circuit at a timing corresponding to a comparison result of the feedback voltage and the reference voltage. A slope adjustment circuit differentiates a current flowing in the coil and adjusts a slope amount of the slope based on a differentiation result of the current.
    Type: Application
    Filed: November 1, 2013
    Publication date: February 27, 2014
    Applicant: Spansion LLC
    Inventors: Shinichiro SUGA, Kenta Ido, Tomohiro Suzuki, Hiroaki Sumiya, Katsuyuki Yasukouchi, Takahiro Yoshino
  • Patent number: 8593126
    Abstract: A power supply device that includes a switch circuit to which an input voltage is supplied, a coil coupled between the switch circuit and an output terminal from which an output voltage is outputted. A voltage adding circuit adds a slope voltage to a reference voltage. A control unit compares a feedback voltage corresponding to the output voltage and the reference voltage and switches the switch circuit at a timing corresponding to a comparison result of the feedback voltage and the reference voltage. A slope adjustment circuit differentiates a current flowing in the coil and adjusts a slope amount of the slope based on a differentiation result of the current.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: November 26, 2013
    Assignee: Spansion LLC
    Inventors: Shinichiro Suga, Kenta Ido, Tomohiro Suzuki, Hiroaki Sumiya, Katsuyuki Yasukouchi, Takahiro Yoshino
  • Publication number: 20120306465
    Abstract: A power supply device that includes a switch circuit to which an input voltage is supplied, a coil coupled between the switch circuit and an output terminal from which an output voltage is outputted. A voltage adding circuit adds a slope voltage to a reference voltage. A control unit compares a feedback voltage corresponding to the output voltage and the reference voltage and switches the switch circuit at a timing corresponding to a comparison result of the feedback voltage and the reference voltage. A slope adjustment circuit differentiates a current flowing in the coil and adjusts a slope amount of the slope based on a differentiation result of the current.
    Type: Application
    Filed: May 15, 2012
    Publication date: December 6, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Shinichiro SUGA, Kenta IDO, Tomohiro SUZUKI, Hiroaki SUMIYA, Katsuyuki YASUKOUCHI, Takahiro YOSHINO
  • Patent number: 8324873
    Abstract: A power supply apparatus is provided which includes: a first switch provided between an inductor and a terminal to which a reference voltage is applied; a second switch provided between the inductor and an output terminal; a first comparator circuit that compares an input voltage with a first comparison voltage; a signal generating circuit that outputs a frequency signal according to an output from the first comparator circuit; and a first control circuit that controls the first and second switches based on an output from the signal generating circuit to control an electrical current flowing into the inductor.
    Type: Grant
    Filed: December 13, 2009
    Date of Patent: December 4, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Shinichi Nakagawa, Masahiro Natsume, Katsuyuki Yasukouchi
  • Patent number: 8233257
    Abstract: A power supply circuit includes an output transistor including a source coupled to power supply voltage, and a drain from which output voltage is outputted; a first error amplifier powered by the power supply voltage and outputting a signal based on a potential difference between the output voltage and a reference voltage; a buffer transistor including a gate coupled to the output of the first error amplifier, and a source coupled via a constant current source to the power supply voltage and coupled to a gate of the output transistor; a current detection transistor coupled to the output transistor such that a gate and source are shared; and an overcurrent protection circuit configured to limit the drain current of the buffer transistor based on the increase of the drain current of the current detection transistor and thereby control the output current of the output transistor.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: July 31, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Morihito Hasegawa, Hidenobu Ito, Kwok Fai Hui, Toshihiko Kasai, Katsuyuki Yasukouchi
  • Patent number: 8203817
    Abstract: A power supply circuit includes an output transistor including a source coupled to power supply voltage, and a drain from which output voltage is outputted; a first error amplifier powered by the power supply voltage and outputting a signal based on a potential difference between the output voltage and a reference voltage; a buffer transistor including a gate coupled to the output of the first error amplifier, and a source coupled via a constant current source to the power supply voltage and coupled to a gate of the output transistor; a current detection transistor coupled to the output transistor such that a gate and source are shared; and an overcurrent protection circuit configured to limit the drain current of the buffer transistor based on the increase of the drain current of the current detection transistor and thereby control the output current of the output transistor.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: June 19, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Morihito Hasegawa, Hidenobu Ito, Kwok Fai Hui, Toshihiko Kasai, Katsuyuki Yasukouchi
  • Publication number: 20100090673
    Abstract: A power supply apparatus is provided which includes: a first switch provided between an inductor and a terminal to which a reference voltage is applied; a second switch provided between the inductor and an output terminal; a first comparator circuit that compares an input voltage with a first comparison voltage; a signal generating circuit that outputs a frequency signal according to an output from the first comparator circuit; and a first control circuit that controls the first and second switches based on an output from the signal generating circuit to control an electrical current flowing into the inductor.
    Type: Application
    Filed: December 13, 2009
    Publication date: April 15, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Shinichi NAKAGAWA, Masahiro Natsume, Katsuyuki Yasukouchi
  • Publication number: 20090201618
    Abstract: A power supply circuit includes an output transistor including a source coupled to power supply voltage, and a drain from which output voltage is outputted; a first error amplifier powered by the power supply voltage and outputting a signal based on a potential difference between the output voltage and a reference voltage; a buffer transistor including a gate coupled to the output of the first error amplifier, and a source coupled via a constant current source to the power supply voltage and coupled to a gate of the output transistor; a current detection transistor coupled to the output transistor such that a gate and source are shared; and an overcurrent protection circuit configured to limit the drain current of the buffer transistor based on the increase of the drain current of the current detection transistor and thereby control the output current of the output transistor.
    Type: Application
    Filed: February 12, 2009
    Publication date: August 13, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Morihito Hasegawa, Hidenobu Ito, Kwok Fai Hui, Toshihiko Kasai, Katsuyuki Yasukouchi
  • Publication number: 20090184699
    Abstract: A power supply apparatus is described that includes a first switch, a second switch, a first comparator, a signal generator and a controller. The first switch is provided between an inductor and a terminal having a reference voltage. The second switch is provided between the inductor and an output terminal. The first comparator compares an input voltage and a first comparison voltage. The signal generator outputs a frequency signal based on an output of the first comparator. The first controller controls current flowing into the inductor by controlling the first switch and the second switch based on the output of the signal generator.
    Type: Application
    Filed: January 15, 2009
    Publication date: July 23, 2009
    Applicant: JUJITSU MICROELECTRONICS LIMITED
    Inventors: Masahiro Natsume, Katsuyuki Yasukouchi
  • Patent number: 7352163
    Abstract: In an input transistor of current mirror circuit, it is intended to prevent the current generated by Early effects from appearing in the output current of the current mirror circuit. Having an Early voltage detector 22 of same connection and structure as a driver circuit 21, and connected in parallel to the driver circuit 21, the current flowing in input transistor Q9 of the Early voltage detector 22 is detected. Output current (current IQ11) of Early voltage detector 22 is added to input current (current IQ5) of driver circuit 21. As a result, in input current (current IQ7) of current mirror circuit 25, current ? due to Early voltage effects can be canceled. At the same time, current ? due to Early voltage effects generated in input transistor Q5 of current mirror circuit 25 is prevented from appearing in output current (current IQ8) of current mirror circuit 25.
    Type: Grant
    Filed: May 19, 2005
    Date of Patent: April 1, 2008
    Assignee: Fujitsu Limited
    Inventors: Yoshihiro Kizaki, Katsuyuki Yasukouchi, Hidenobu Ito
  • Patent number: 7250745
    Abstract: In a DC-DC converter of synchronous rectifying system, a control circuit of DC-DC converter capable of improving the control voltage value of output voltage at light load and enhancing the power conversion efficiency, and its control method are presented. An inverting input terminal of comparator COMP2 of which non-inverting input terminal is connected to a grounding potential is connected to one terminal of choke coil L1 by way of terminal (X). An output terminal (N1) of comparator COMP2 is connected to a delay circuit DL, and an output terminal (N2) of delay circuit DL is connected to AND gate circuit AND1. The delay circuit DL is a circuit for delaying the transition from high level to low level of input terminal (N1). Excessive power supplied more than demanded by the load at light load is returned to choke coil L1. Elevation of output voltage VOUT due to excess power accumulated in output capacitor C1 can be suppressed.
    Type: Grant
    Filed: October 27, 2004
    Date of Patent: July 31, 2007
    Assignee: Fujitsu Limited
    Inventors: Katsuyuki Yasukouchi, Hidenobu Ito
  • Patent number: 7113041
    Abstract: An operational amplifier that decreases idling current, widens a voltage output range, and increases load driving capacity. The operational amplifier includes a first output transistor connected to a high potential power supply. A second output transistor is connected between the first output transistor and a low potential power supply. The first and second output transistors generate an output signal at a node between the first output transistor and the second output transistor. An idling current control circuit controls the collector current of the first output transistor in accordance with the base voltage of the second output transistor to control the idling current of the first and second output transistors.
    Type: Grant
    Filed: April 19, 2005
    Date of Patent: September 26, 2006
    Assignee: Fujitsu Limited
    Inventors: Katsuyuki Yasukouchi, Ayuko Watabe
  • Publication number: 20060192543
    Abstract: In an input transistor of current mirror circuit, it is intended to prevent the current generated by Early effects from appearing in the output current of the current mirror circuit. Having an Early voltage detector 22 of same connection and structure as a driver circuit 21, and connected in parallel to the driver circuit 21, the current flowing in input transistor Q9 of the Early voltage detector 22 is detected. Output current (current IQ11) of Early voltage detector 22 is added to input current (current IQ5) of driver circuit 21. As a result, in input current (current IQ7) of current mirror circuit 25, current ? due to Early voltage effects can be canceled. At the same time, current ? due to Early voltage effects generated in input transistor Q5 of current mirror circuit 25 is prevented from appearing in output current (current IQ8) of current mirror circuit 25.
    Type: Application
    Filed: May 19, 2005
    Publication date: August 31, 2006
    Inventors: Yoshihiro Kizaki, Katsuyuki Yasukouchi, Hidenobu Ito
  • Patent number: 7012411
    Abstract: Provides a switching regulator control circuit, a switching regulator and a switching regulator control method for achieving low current consumption and quick response at normal operating time. A change-over switch MFB for opening/closing the phase compensation is provided to establish both the quick responsibility using a gain of an error amplifier EA provided with no phase compensation and stability of control system provided with phase compensation. By turning the change-over switch MFB non-conductive at a timing in which the PMOS transistor M1 turns to conductive, the phase compensation between the input and output of the error amplifier EA is cut off. A detection voltage VM is amplified in term of error with a gain of the error amplifier EA itself. A quick transient response to changes in the output voltage VOUT is achieved corresponding to maximum response characteristic.
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: March 14, 2006
    Assignee: Fujitsu Limited
    Inventor: Katsuyuki Yasukouchi
  • Publication number: 20050285579
    Abstract: In a DC-DC converter of synchronous rectifying system, a control circuit of DC-DC converter capable of improving the control voltage value of output voltage at light load and enhancing the power conversion efficiency, and its control method are presented. An inverting input terminal of comparator COMP2 of which non-inverting input terminal is connected to a grounding potential is connected to one terminal of choke coil L1 by way of terminal (X). An output terminal (N1) of comparator COMP2 is connected to a delay circuit DL, and an output terminal (N2) of delay circuit DL is connected to AND gate circuit AND1. The delay circuit DL is a circuit for delaying the transition from high level to low level of input terminal (N1). Excessive power supplied more than demanded by the load at light load is returned to choke coil L1. Elevation of output voltage VOUT due to excess power accumulated in output capacitor C1 can be suppressed.
    Type: Application
    Filed: October 27, 2004
    Publication date: December 29, 2005
    Inventors: Katsuyuki Yasukouchi, Hidenobu Ito
  • Publication number: 20050212499
    Abstract: Provides a switching regulator control circuit, a switching regulator and a switching regulator control method for achieving low current consumption and quick response at normal operating time. A change-over switch MFB for opening/closing the phase compensation is provided to establish both the quick responsibility using a gain of an error amplifier EA provided with no phase compensation and stability of control system provided with phase compensation. By turning the change-over switch MFB non-conductive at a timing in which the PMOS transistor M1 turns to conductive, the phase compensation between the input and output of the error amplifier EA is cut off. A detection voltage VM is amplified in term of error with a gain of the error amplifier EA itself. A quick transient response to changes in the output voltage VOUT is achieved corresponding to maximum response characteristic.
    Type: Application
    Filed: September 24, 2004
    Publication date: September 29, 2005
    Inventor: Katsuyuki Yasukouchi
  • Publication number: 20050179496
    Abstract: An operational amplifier that decreases idling current, widens a voltage output range, and increases load driving capacity. The operational amplifier includes a first output transistor connected to a high potential power supply. A second output transistor is connected between the first output transistor and a low potential power supply. The first and second output transistors generate an output signal at a node between the first output transistor and the second output transistor. An idling current control circuit controls the collector current of the first output transistor in accordance with the base voltage of the second output transistor to control the idling current of the first and second output transistors.
    Type: Application
    Filed: April 19, 2005
    Publication date: August 18, 2005
    Inventors: Katsuyuki Yasukouchi, Ayuko Watabe