Abstract: Structures that include a semiconductor layer formed by lateral epitaxial growth and methods of forming such structures. The structure comprises a first semiconductor layer that includes first and second sections, and that comprises a first single-crystal semiconductor material. The structure further comprises a second semiconductor layer that includes a section and a semiconductor region, and that comprises one or more second single-crystal semiconductor materials. The semiconductor region extends between the second section of the first semiconductor layer and the section of the second semiconductor layer. An opening penetrates at least partially through the first semiconductor layer and through the second semiconductor layer. The opening is oriented along a (100) crystal plane of the first single-crystal semiconductor material, and the semiconductor region borders the opening.

Abstract: Structures that include a semiconductor layer formed by lateral epitaxial growth and methods of forming such structures. The structure comprises a first semiconductor layer including a first section and a second section adjacent to the first section, a second semiconductor layer including a section and a semiconductor region that projects from the second section of the first semiconductor layer to the section of the second semiconductor layer, and a dielectric layer disposed between the first section of the first semiconductor layer and the section of the second semiconductor layer. The section and the semiconductor region of the second semiconductor layer comprise one or more single-crystal semiconductor materials.

Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to dual trench isolation structures and methods of manufacture. The structure includes: a doped well region in a substrate; a dual trench isolation region within the doped well region, the dual trench isolation region comprising a first isolation region of a first depth and a second isolation region of a second depth, different than the first depth; and a gate structure on the substrate and extending over a portion of the dual trench isolation region.

Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to dual trench isolation structures and methods of manufacture. The structure includes: a doped well region in a substrate; a dual trench isolation region within the doped well region, the dual trench isolation region comprising a first isolation region of a first depth and a second isolation region of a second depth, different than the first depth; and a gate structure on the substrate and extending over a portion of the dual trench isolation region.