Patents by Inventor Kaveh Naderi

Kaveh Naderi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170147463
    Abstract: A method for determining cable connections identifies a plurality of cables connected to a link included in a first device. The method identifies a first cable connected to the link included in the first device. The method determines that a second cable connected to is connected to a link included in a second device The method further determines that only one of an inbound and an outbound channel of a signaling lane included in the first cable is operable. The method utilizes a second cable to perform one of disabling signal transmission or detecting loss of signal on the operable channel. The method enables and disables signal transmission on the operable channel to determine that the first cable is connected to the link included in the remote device.
    Type: Application
    Filed: November 20, 2015
    Publication date: May 25, 2017
    Inventors: Jesse P. Arroyo, Christopher J. Engel, Kaveh Naderi
  • Publication number: 20170116090
    Abstract: A method, system and computer program product are provided for implementing cable failover in multiple cable Peripheral Component Interconnect Express (PCIE) IO interconnections to an external IO enclosure. System firmware is provided for implementing health check functions for the PCIE IO interconnections to identify a faulted low byte cable. A cable failover mechanism recovers a PCI link to the external IO enclosure. A multiplexer logic is provided between the PCIE host bridge (PHB) and the cable connected to the IO enclosure to perform a full lane reversal of the PCIE lanes.
    Type: Application
    Filed: March 8, 2016
    Publication date: April 27, 2017
    Inventors: Jesse P. Arroyo, Christopher J. Engel, Kaveh Naderi, James E. Smith
  • Publication number: 20170116093
    Abstract: A method, system and computer program product are provided for implementing cable failover in multiple cable Peripheral Component Interconnect Express (PCIE) IO interconnections to an external IO enclosure. System firmware is provided for implementing health check functions for the PCIE IO interconnections to identify a faulted low byte cable. A cable failover mechanism recovers a PCI link to the external IO enclosure. A multiplexer logic is provided between the PCIE host bridge (PHB) and the cable connected to the IO enclosure to perform a full lane reversal of the PCIE lanes.
    Type: Application
    Filed: October 27, 2015
    Publication date: April 27, 2017
    Inventors: Jesse P. Arroyo, Christopher J. Engel, Kaveh Naderi, James E. Smith
  • Patent number: 9625939
    Abstract: Embodiments of the present disclosure provide an apparatus for synchronizing a common reference clock over optics. For example, a reference clock from a host device may be frequency adjusted based on a pass-band of an optical link, decoded, and converted into an optical signal, and transferred to a controller of a target device via one or more optical cables. The controller may be used to recover the reference clock using the optical signal, which may be used as a common-reference clock for communications between the host and target devices.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: April 18, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Joseph J. Cahill, Daniel M. Dreps, Kaveh Naderi, James E. Smith
  • Publication number: 20170063449
    Abstract: Computer program product and apparatus for repairing a communication link failure. In certain embodiments, the apparatus generally includes a controller configured to initialize the communication link for communication with another apparatus using an initial number of channels of a plurality of channels. The apparatus may also include a plurality of multiplexers configured to selectively couple a plurality of communication lanes with the plurality of channels of the communication link. In certain embodiments, during an initial state, a first lane of the plurality of lanes may be coupled with a first channel of the plurality of channels, and the plurality of channels may include a spare channel. The controller may determine whether at least one channel of the plurality of channels is experiencing a failure and control at least one of the multiplexers such that the failed channel is replaced by another channel of the plurality of channels by using the spare channel.
    Type: Application
    Filed: September 1, 2015
    Publication date: March 2, 2017
    Inventors: Daniel M. DREPS, Nanju NA, Kaveh NADERI, James E. SMITH
  • Publication number: 20170063448
    Abstract: Method for repairing a communication link failure. In certain embodiments, the method generally includes communicating with another apparatus using an initial number of channels of a plurality of channels of a communication link; selectively coupling a plurality of communication lanes with the plurality of channels of the communication link, wherein, during an initial state, a first lane of the plurality of lanes is coupled with a first channel of the plurality of channels, and wherein the plurality of channels comprises a spare channel; determining whether at least one channel of the plurality of channels is experiencing a failure; and controlling at least one of the multiplexers such that the failed channel is replaced by another channel of the plurality of channels by using the spare channel.
    Type: Application
    Filed: September 29, 2015
    Publication date: March 2, 2017
    Inventors: Daniel M. DREPS, Nanju NA, Kaveh NADERI, James E. SMITH
  • Patent number: 9582366
    Abstract: A method, system and computer program product are provided for detecting state and sparing of optical Peripheral Component Interconnect Express (PCI-Express or PCIE) cable channels attached to an IO drawer. System firmware is provided for implementing health check functions and state detection and sparing functions. One or more optical cables are connected between a host bridge and a PCIE enclosure, each optical cable includes one or more spare optical channels. An identified failed optical channel is rerouted to the spare optical channel.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: February 28, 2017
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Ellen M. Bauman, Timothy R. Block, Christopher J. Engel, Kaveh Naderi, Gregory M. Nordstrom, Harald Pross, Thomas R. Sand
  • Publication number: 20170052559
    Abstract: Embodiments of the present disclosure provide an apparatus for synchronizing a common reference clock over optics. For example, a reference clock from a host device may be frequency adjusted based on a pass-band of an optical link, decoded, and converted into an optical signal, and transferred to a controller of a target device via one or more optical cables. The controller may be used to recover the reference clock using the optical signal, which may be used as a common-reference clock for communications between the host and target devices.
    Type: Application
    Filed: August 20, 2015
    Publication date: February 23, 2017
    Inventors: Joseph J. CAHILL, Daniel M. DREPS, Kaveh NADERI, James E. SMITH
  • Patent number: 9529766
    Abstract: A method and a system for enabling communications on a signaling link include a first and a second device interconnected by the signaling link. The first device performs the method to acquire information from the second device. Based on the information acquired the first device determines to enable the signaling link for operational communications between the first device and the second device. A computer programming product instructs a computer to perform the method.
    Type: Grant
    Filed: April 27, 2016
    Date of Patent: December 27, 2016
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Christopher J. Engel, Kaveh Naderi
  • Publication number: 20160203100
    Abstract: A method, system and computer program product are provided for implementing health check for optical cable attached Peripheral Component Interconnect Express (PCIE) enclosures in a computer system. System firmware is provided for implementing health check functions. One or more optical cables are connected between a host bridge and a PCIE enclosure. A PCIE link to the PCIE enclosure is reset responsive to a predefined event. After a set delay, a PCIE link health check is performed verifying PCIE link width and speed.
    Type: Application
    Filed: March 19, 2016
    Publication date: July 14, 2016
    Inventors: Jesse P. Arroyo, Ellen M. Bauman, Timothy R. Block, Christopher J. Engel, Kaveh Naderi, Harald Pross, Thomas R. Sand
  • Publication number: 20160147705
    Abstract: A method, system and computer program product are provided for implementing health check for optical cable attached Peripheral Component Interconnect Express (PCIE) enclosures in a computer system. System firmware is provided for implementing health check functions. One or more optical cables are connected between a host bridge and a PCIE enclosure. A PCIE link to the PCIE enclosure is reset responsive to a predefined event. After a set delay, a PCIE link health check is performed verifying PCIE link width and speed.
    Type: Application
    Filed: November 21, 2014
    Publication date: May 26, 2016
    Inventors: Jesse P. Arroyo, Ellen M. Bauman, Timothy R. Block, Christopher J. Engel, Kaveh Naderi, Harald Pross, Thomas R. Sand
  • Publication number: 20160147628
    Abstract: A method, system and computer program product are provided for detecting state and sparing of optical Peripheral Component Interconnect Express (PCI-Express or PCIE) cable channels attached to an IO drawer. System firmware is provided for implementing health check functions and state detection and sparing functions. One or more optical cables are connected between a host bridge and a PCIE enclosure, each optical cable includes one or more spare optical channels. An identified failed optical channel is rerouted to the spare optical channel.
    Type: Application
    Filed: November 21, 2014
    Publication date: May 26, 2016
    Inventors: Jesse P. Arroyo, Ellen M. Bauman, Timothy R. Block, Christopher J. Engel, Kaveh Naderi, Gregory M. Nordstrom, Harald Pross, Thomas R. Sand
  • Publication number: 20160147606
    Abstract: A method, system and computer program product are provided for detecting state and sparing of optical Peripheral Component Interconnect Express (PCI-Express or PCIE) cable channels attached to an IO drawer. System firmware is provided for implementing health check functions and state detection and sparing functions. One or more optical cables are connected between a host bridge and an PCIE enclosure, each optical cable includes one or more spare optical channels. An identified failed optical channel is rerouted to the spare optical channel.
    Type: Application
    Filed: September 26, 2015
    Publication date: May 26, 2016
    Inventors: Jesse P. Arroyo, Ellen M. Bauman, Timothy R. Block, Christopher J. Engel, Kaveh Naderi, Gregory M. Nordstrom, Harald Pross, Thomas R. Sand
  • Patent number: 7890690
    Abstract: A method for emulating a dual-port I2C device includes monitoring a bus for I2C traffic. A system receives an I2C interrupt on the bus. The system determines whether the received I2C interrupt is one of either a hardware interrupt or a software interrupt. In the event the received I2C interrupt is a hardware interrupt, the system responds to the hardware interrupt, and accesses a flash memory for read/write operation based on the hardware interrupt. In the event the received I2C interrupt is a software interrupt, the system responds to the software interrupt, and accesses a flash memory for read/write operation based on the software interrupt.
    Type: Grant
    Filed: June 7, 2007
    Date of Patent: February 15, 2011
    Assignee: International Business Machines Corporation
    Inventors: Kaveh Naderi, Patrick Allen Buckland, Jason Eric Moore, Abel Enrique Zuzuarregui
  • Patent number: 7676622
    Abstract: A system for bus communication includes a first port coupled to a bus, comprising a first engine configured to respond to bus signals on the bus, according to a predetermined protocol. A second port couples to the bus, comprising a second engine configured to respond to bus signals according to the predetermined protocol. A control module couples to the second port and is configured to receive a port state signal, and to disable the second port based on the received port state signal.
    Type: Grant
    Filed: June 7, 2007
    Date of Patent: March 9, 2010
    Assignee: International Business Machines Corporation
    Inventors: Kaveh Naderi, Patrick Allen Buckland, Jason Eric Moore, Abel Enrique Zuzuarregui
  • Publication number: 20080307148
    Abstract: A system for bus communication includes a first port coupled to a bus, comprising a first engine configured to respond to bus signals on the bus, according to a predetermined protocol. A second port couples to the bus, comprising a second engine configured to respond to bus signals according to the predetermined protocol. A control module couples to the second port and is configured to receive a port state signal, and to disable the second port based on the received port state signal.
    Type: Application
    Filed: June 7, 2007
    Publication date: December 11, 2008
    Inventors: Kaveh Naderi, Patrick Allen Buckland, Jason Eric Moore, Abel Enrique Zuzuarregui
  • Publication number: 20080307154
    Abstract: A method for emulating a dual-port I2C device includes monitoring a bus for I2C traffic. A system receives an I2C interrupt on the bus. The system determines whether the received I2C interrupt is one of either a hardware interrupt or a software interrupt. In the event the received I2C interrupt is a hardware interrupt, the system responds to the hardware interrupt, and accesses a flash memory for read/write operation based on the hardware interrupt. In the event the received I2C interrupt is a software interrupt, the system responds to the software interrupt, and accesses a flash memory for read/write operation based on the software interrupt.
    Type: Application
    Filed: June 7, 2007
    Publication date: December 11, 2008
    Inventors: Kaveh Naderi, Patrick Allen Buckland, Jason Eric Moore, Abel Enrique Zuzuarregui