Abstract: An integrated circuit device may include a first network on chip (NOC) circuit configured to receive a set of data and transfer the set of data to a first node of the first NOC circuitry. The first node is configured to transfer the set of data to a second NOC circuit of an additional integrated circuit device separate from the integrated circuit device.

Abstract: A method and apparatus to perform aging are described. A method to perform timing comprises receiving an address and retrieving an age zone value associated with the received address. A time is then determined using the retrieved age zone value. The determined time may then be associated with the received address.

Abstract: According to some embodiments, a parity check is provided for ternary content addressable memory. For example, it may be arranged for a read request to be transmitted to a ternary content addressable memory unit. Data content may then be received from the memory unit in response to the read request, a parity check may be performed on the data content. According to some embodiments, parity information may be masked when the memory unit is queried.

Abstract: Ethernet systems and methods for auto-learning of MAC addresses and lexicographic lookup of hardware databases are disclosed. An Ethernet network device generally includes a hardware MAC address database containing MAC address entries and a hardware MAC address learning engine in communication with the hardware MAC address database and configured to receive an unresolved source MAC address to be learned and to record the unresolved source MAC address in the hardware MAC address database in a corresponding MAC address entry. The Ethernet network device may also include a hardware lexicographic lookup engine configured to perform hardware lookups of MAC address entries in the hardware MAC address database and to interface with a management application program interface (API) for management of the Ethernet network device.

Abstract: A method and apparatus to perform aging are described.

Abstract: A method and apparatus for generating Gray code for any even count value to enable efficient pointer exchange mechanisms in asynchronous FIFO's. Allowing Gray code for any range of even count values provides the benefit of decreasing metastability when exchanging pointers for FIFO buffers in asynchronous environments. Utilizing the Gray code adjacency principle, which provides that only one bit changes for any successive numbers, in a larger class of numbers than previously utilized, decreases metastability.

Abstract: According to some embodiments, a parity check is provided for ternary content addressable memory.

Abstract: A method and apparatus for generating Gray code for any even count value to enable efficient pointer exchange mechanisms in asynchronous FIFO's. Allowing Gray code for any range of even count values provides the benefit of decreasing metastability when exchanging pointers for FIFO buffers in asynchronous environments. Utilizing the Gray code adjacency principle, which provides that only one bit changes for any successive numbers, in a larger class of numbers than previously utilized, decreases metastability.

Abstract: A method and apparatus for generating Gray code for any even count value to enable efficient pointer exchange mechanisms in asynchronous FIFO's. Allowing Gray code for any range of even count values provides the benefit of decreasing metastability when exchanging pointers for FIFO buffers in asynchronous environments. Utilizing the Gray code adjacency principle, which provides that only one bit changes for any successive numbers, in a larger class of numbers than previously utilized, decreases metastability.