Abstract: Present disclosure relates to a system for validating target backplane controller chips. The system includes a backplane controller chip validation board. In certain embodiments, the backplane controller chip validation board includes: (a) a program/verify/validate controller chip, (b) one or more backplane controller chip sockets for installing one or more target backplane controller chips, and (c) a backplane simulator. The program/verify/validate controller chip includes backplane controller chip firmware verification software, a USB interface, and a software storage. The backplane simulator is used to simulate functions of drives, LEDs, and other devices of a backplane for verifying all functions of target backplane controller chips. The backplane controller chip validation board is in communication with a host computer, and the host computer has a user interface, a backplane controller chip validation software, a USB interface, and a software storage to store backplane controller chip firmware.

Abstract: Present disclosure relates to a system for programming and verifying backplane controller chip firmware on target backplane controller chips. The system includes a backplane controller chip validation board. In certain embodiments, the backplane controller chip validation board includes: (a) a program/verify/validate controller chip, (b) one or more backplane controller chip sockets for installing one or more target backplane controller chips, and (c) a backplane simulator. The program/verify/validate controller chip includes backplane controller chip firmware verification software, a USB interface, and a software storage. The backplane simulator is used to simulate functions of drives, LEDs, and other devices of a backplane for verifying all functions of backplane controller chip firmware.

Abstract: An aspect of present disclosure relates to a computer-implemented method for handling two SGPIO channels by using one SGPIO decoder. The method includes: (a) establishing communication between a backplane controller and a host computer through HBA, (b) receiving control commands and control data for monitoring and controlling a first and a second group of drive slots, (c) checking a clock signal having a first time period and a second time period, (d) forwarding the control commands and control data for the first group to the first group of drive slots during first time period, and forwarding the control commands and control data for the second group to the second group of drive slots during second time period, (e) receiving responses from first and second group of drive slots, respectively, and (f) sending the responses from first and second group of drive slots to the host computer.

Abstract: Present disclosure relates to a computer-implemented method for handling two SES sidebands using one SMBUS controller. The method includes one or more of following operations: (a) establishing communication between a backplane controller and a host computer through HBA, (b) receiving control commands and control data from host computer for monitoring and controlling at least one drive of first and second group of drives, (c) determining address and device number of drive to which received control commands and control data are directed, (d) forwarding control commands and control data to first or second SMBUS sideband handler based on address received, (e) controlling the blinking of the LEDs of the drive by first or second SMBUS sideband handler, (f) generating responses by the first or second SMBUS sideband handler, (g) receiving responses by the SMBUS controller, and (h) sending the responses back to the host computer within a predetermined time period.

Abstract: Certain aspects relate to monitoring and managing storage drives installed on a backplane and performing backplane controller firmware update through a universal serial bus (USB) interface. When the backplane controller is connected to a host computer via the USB interface, the backplane controller sends USB descriptors to the host computer through the USB interface such that the host computer recognizes the backplane controller as a specific human interface device (HID) device based on the USB descriptors. Thus, the backplane controller and the host computer may transmit backplane drive management messages, such as the result to monitor and manage the storage drives, or the control commands and control data to monitor and manage the storage drives and to update the firmware of the backplane controller, as USB HID reports in a predefined format based on the USB descriptors.

Abstract: Present disclosure relates to backplane controller configured as human interface device (HID) device to communicate with host computer through USB interface. Backplane controller includes: processor, memory, HID universal serial bus (USB) interface, and non-volatile memory. Non-volatile memory stores certain USB descriptors, drive management module, USB HID device driver, and firmware of the backplane controller. Firmware performs one or more of following operations: (a) connecting to host computer through USB interface, (b) sending USB descriptors to host computer to act as specific HID device, (c) instructing USB HID device driver of backplane controller to generate first USB HID report, (d) sending USB HID report to host computer through USB interface, (e) receiving second USB HID report from host computer through USB interface, (f) instructing USB HID device driver to retrieve and process report data from second USB HID report.

Abstract: According to one aspect, a computing system having a plurality of enclosure management controllers (EMCs) is disclosed. In one embodiment, the EMCs are communicatively coupled to each other and each EMC is operatively connected to a corresponding plurality of drive slots and at least one of a plurality of drive slot status indicators. Each EMC is operative to receive enclosure management data, detect an operational status of the drive slots, and generate drive slot status data. One of the EMCs is configured to function at least partly as a master EMC to receive drive slot status data and, based on received enclosure management data and received drive slot status data, generate mapped data for each one of the EMCs for selectively activating at least one of the drive slot status indicators to indicate corresponding operational status.

Abstract: Present disclosure relates to backplane controller configured as human interface device (HID) device to communicate with host computer through USB interface. Backplane controller includes: processor, memory, HID universal serial bus (USB) interface, and non-volatile memory. Non-volatile memory stores certain USB descriptors, drive management module, USB HID device driver, and firmware of the backplane controller. Firmware performs one or more of following operations: (a) connecting to host computer through USB interface, (b) sending USB descriptors to host computer to act as specific HID device, (c) instructing USB HID device driver of backplane controller to generate first USB HID report, (d) sending USB HID report to host computer through USB interface, (e) receiving second USB HID report from host computer through USB interface, (f) instructing USB HID device driver to retrieve and process report data from second USB HID report.

Abstract: Certain aspects relate to monitoring and managing storage drives installed on a backplane and performing backplane controller firmware update through a universal serial bus (USB) interface. When the backplane controller is connected to a host computer via the USB interface, the backplane controller sends USB descriptors to the host computer through the USB interface such that the host computer recognizes the backplane controller as a specific human interface device (HID) device based on the USB descriptors. Thus, the backplane controller and the host computer may transmit backplane drive management messages, such as the result to monitor and manage the storage drives, or the control commands and control data to monitor and manage the storage drives and to update the firmware of the backplane controller, as USB HID reports in a predefined format based on the USB descriptors.

Abstract: An aspect of present disclosure relates to a computer-implemented method for handling two SGPIO channels by using one SGPIO decoder. The method includes: (a) establishing communication between a backplane controller and a host computer through HBA, (b) receiving control commands and control data for monitoring and controlling a first and a second group of drive slots, (c) checking a clock signal having a first time period and a second time period, (d) forwarding the control commands and control data for the first group to the first group of drive slots during first time period, and forwarding the control commands and control data for the second group to the second group of drive slots during second time period, (e) receiving responses from first and second group of drive slots, respectively, and (f) sending the responses from first and second group of drive slots to the host computer.

Abstract: Present disclosure relates to a computer-implemented method for handling two SES sidebands using one SMBUS controller. The method includes one or more of following operations: (a) establishing communication between a backplane controller and a host computer through HBA, (b) receiving control commands and control data from host computer for monitoring and controlling at least one drive of first and second group of drives, (c) determining address and device number of drive to which received control commands and control data are directed, (d) forwarding control commands and control data to first or second SMBUS sideband handler based on address received, (e) controlling the blinking of the LEDs of the drive by first or second SMBUS sideband handler, (f) generating responses by the first or second SMBUS sideband handler, (g) receiving responses by the SMBUS controller, and (h) sending the responses back to the host computer within a predetermined time period.

Abstract: Present disclosure relates to a system for validating target backplane controller chips. The system includes a backplane controller chip validation board. In certain embodiments, the backplane controller chip validation board includes: (a) a program/verify/validate controller chip, (b) one or more backplane controller chip sockets for installing one or more target backplane controller chips, and (c) a backplane simulator. The program/verify/validate controller chip includes backplane controller chip firmware verification software, a USB interface, and a software storage. The backplane simulator is used to simulate functions of drives, LEDs, and other devices of a backplane for verifying all functions of target backplane controller chips. The backplane controller chip validation board is in communication with a host computer, and the host computer has a user interface, a backplane controller chip validation software, a USB interface, and a software storage to store backplane controller chip firmware.

Abstract: Present disclosure relates to a system for programming and verifying backplane controller chip firmware on target backplane controller chips. The system includes a backplane controller chip validation board. In certain embodiments, the backplane controller chip validation board includes: (a) a program/verify/validate controller chip, (b) one or more backplane controller chip sockets for installing one or more target backplane controller chips, and (c) a backplane simulator. The program/verify/validate controller chip includes backplane controller chip firmware verification software, a USB interface, and a software storage. The backplane simulator is used to simulate functions of drives, LEDs, and other devices of a backplane for verifying all functions of backplane controller chip firmware.

Abstract: According to one aspect, a backplane controller of a storage backplane is disclosed, the storage backplane having a plurality of drive slots configured to operatively connect to a corresponding plurality of mass storage devices. In one embodiment, the backplane controller is operative to perform functions that include detecting activity status on a first serial interface that is configured to operatively connect one or more sets of a plurality of drive slots on the storage backplane to a host bus adapter (HBA), according to a first drive slot assignment. The backplane controller is further operative to detect an activity status on a second serial interface that is configured to operatively connect one or more sets of a plurality of drive slots on the storage backplane to the HBA, according to a second drive slot assignment.

Abstract: According to one aspect, a data storage system is disclosed.

Abstract: According to one aspect, a computing system having a plurality of enclosure management controllers (EMCs) is disclosed. In one embodiment, the EMCs are communicatively coupled to each other and each EMC is operatively connected to a corresponding plurality of drive slots and at least one of a plurality of drive slot status indicators. Each EMC is operative to receive enclosure management data, detect an operational status of the drive slots, and generate drive slot status data. One of the EMCs is configured to function at least partly as a master EMC to receive drive slot status data and, based on received enclosure management data and received drive slot status data, generate mapped data for each one of the EMCs for selectively activating at least one of the drive slot status indicators to indicate corresponding operational status.

Abstract: In one aspect, a microcontroller is disclosed. In one embodiment, the microcontroller includes a system memory that has an erasable memory of a first type, with a first storage partition and a second, different storage partition. The system memory also has a random access memory (RAM). The microcontroller further includes a network interface that is configured to communicate management commands over a communications link, and a programmable processor that is operatively connected to the system memory and the network interface. The communications link includes an interface bus and is configured for one or more of I2C, SPI, and system management bus communications.

Abstract: According to one aspect, a backplane controller of a storage backplane is disclosed, the storage backplane having a plurality of drive slots configured to operatively connect to a corresponding plurality of mass storage devices. In one embodiment, the backplane controller is operative to perform functions that include detecting activity status on a first serial interface that is configured to operatively connect one or more sets of a plurality of drive slots on the storage backplane to a host bus adapter (HBA), according to a first drive slot assignment. The backplane controller is further operative to detect an activity status on a second serial interface that is configured to operatively connect one or more sets of a plurality of drive slots on the storage backplane to the HBA, according to a second drive slot assignment.

Abstract: According to one aspect, a data storage system is disclosed.

Abstract: Technologies are described herein for assigning multiple frequency states within a serial I/O interface. Bits within the serial I/O stream may be placed in frequency states in addition to high and low logic states. Placing a serial I/O bit into a frequency state where the bit may be transitioned according to a set of allowed frequencies can extend the information represented by each bit slot of a cyclical data I/O bit stream beyond the typical two states of logic high and logic low. A transition counter may be provided for each bit slot of a serialized stream. Each transition counter may be incremented in response to the respective bit slot changing its state from its previous sampled state. A frequency state may be assigned to a bit slot in response to a respective transition counter range associated with that bit slot.