Abstract: First and second channel bridge amplifiers are dynamically configured to drive either speakers or headphones. The first channel bridge amplifier includes a first amplifier driving one end of a first speaker through a mechanical switch in a headphone-jack, and a second amplifier driving another end of the first speaker. The second channel bridge amplifier includes third and fourth amplifiers driving respective ends of a second speaker. An amplifier control circuit dynamically detects the insertion or removal of a plug in the jack and configures the amplifiers accordingly. When a plug is inserted into the jack, the mechanical switch disconnects the first speaker from the first amplifier, and the fourth amplifier is tri-stated disconnect the second speaker. The first and third amplifiers are configured to drive the first and second channels of the headphones, while the third amplifier drives the headphone common point (shield ring) as a virtual ground connection.

Abstract: First and second channel bridge amplifiers are dynamically configured to drive either speakers or headphones. The first channel bridge amplifier includes a first amplifier driving one end of a first speaker through a mechanical switch in a headphone-jack, and a second amplifier driving another end of the first speaker. The second channel bridge amplifier includes third and fourth amplifiers driving respective ends of a second speaker. An amplifier control circuit dynamically detects the insertion or removal of a plug in the jack and configures the amplifiers accordingly. When a plug is inserted into the jack, the mechanical switch disconnects the first speaker from the first amplifier, and the fourth amplifier is tri-stated disconnect the second speaker. The first and third amplifiers are configured to drive the first and second channels of the headphones, while the third amplifier drives the headphone common point (shield ring) as a virtual ground connection.

Abstract: First and second channel bridge amplifiers are dynamically configured to drive either speakers or headphones. The first channel bridge amplifier includes a first amplifier driving one end of a first speaker through a mechanical switch in a headphone-jack, and a second amplifier driving another end of the first speaker. The second channel bridge amplifier includes third and fourth amplifiers driving respective ends of a second speaker. An amplifier control circuit dynamically detects the insertion or removal of a plug in the jack and configures the amplifiers accordingly. When a plug is inserted into the jack, the mechanical switch disconnects the first speaker from the first amplifier, and the fourth amplifier is tri-stated disconnect the second speaker. The first and third amplifiers are configured to drive the first and second channels of the headphones, while the third amplifier drives the headphone common point (shield ring) as a virtual ground connection.

Abstract: First and second channel bridge amplifiers are dynamically configured to drive either speakers or headphones. The first channel bridge amplifier includes a first amplifier driving one end of a first speaker through a mechanical switch in a headphone-jack, and a second amplifier driving another end of the first speaker. The second channel bridge amplifier includes third and fourth amplifiers driving respective ends of a second speaker. To suppress click and pop, an amplifier control circuit maintains certain amplifiers (depending on headphone or speaker mode) tri-stated until input coupling capacitors have fully charged and an input signal exceeding a predetermined amount is detected.

Abstract: First and second channel bridge amplifiers are dynamically configured to drive either speakers or headphones. The first channel bridge amplifier includes a first amplifier driving one end of a first speaker through a mechanical switch in a headphone-jack, and a second amplifier driving another end of the first speaker. The second channel bridge amplifier includes third and fourth amplifiers driving respective ends of a second speaker. To suppress click and pop, an amplifier control circuit maintains certain amplifiers (depending on headphone or speaker mode) tri-stated until input coupling capacitors have fully charged and an input signal exceeding a predetermined amount is detected.

Abstract: First and second channel bridge amplifiers are dynamically configured to drive either speakers or headphones. The first channel bridge amplifier includes a first amplifier driving one end of a first speaker through a mechanical switch in a headphone-jack, and a second amplifier driving another end of the first speaker. The second channel bridge amplifier includes third and fourth amplifiers driving respective ends of a second speaker. An amplifier control circuit dynamically detects the insertion or removal of a plug in the jack and configures the amplifiers accordingly. When a plug is inserted into the jack, the mechanical switch disconnects the first speaker from the first amplifier, and the fourth amplifier is tri-stated disconnect the second speaker. The first and third amplifiers are configured to drive the first and second channels of the headphones, while the third amplifier drives the headphone common point (shield ring) as a virtual ground connection.

Abstract: Audio power amplifier circuits that are arranged to operate in either a class AB or a class D operating mode. A drive circuit is configured to share control between a class AB driver and a class D modulator/driver circuit. The input signal level is monitored to determine their levels. When the input signal level is below a minimum signal level, the audio power amplifier circuits are operated in a standby mode. The power amplifier circuits are operated in a class AB mode when the input signal levels are in a defined operating range that exceeds the minimum signal level. When the input signal levels exceed a maximum signal threshold, the power amplifier circuits are operated in a class D mode. Hysterisis can be employed to minimize oscillation conditions about any one particular trip-point for the operating modes.

Abstract: First and second channel bridge amplifiers are dynamically configured to drive either speakers or headphones. The first channel bridge amplifier includes a first amplifier driving one end of a first speaker through a mechanical switch in a headphone-jack, and a second amplifier driving another end of the first speaker. The second channel bridge amplifier includes third and fourth amplifiers driving respective ends of a second speaker. An amplifier control circuit dynamically detects the insertion or removal of a plug in the jack and configures the amplifiers accordingly. When a plug is inserted into the jack, the mechanical switch disconnects the first speaker from the first amplifier, and the fourth amplifier is tri-stated disconnect the second speaker. The first and third amplifiers are configured to drive the first and second channels of the headphones, while the third amplifier drives the headphone common point (shield ring) as a virtual ground connection.

Abstract: A fully differential class D amplifier includes a pulse width modulator and a power stage. The pulse width modulator is arranged to employ a differential output signal provided from the power stage as a feedback signal. The pulse width modulator includes a transimpedance amplifier that is arranged to generate a triangle wave from the input signal and the feedback signal. The transimpedance amplifier is arranged to generate the triangle wave such that the triangle wave that has approximately a 50% duty cycle when no input signal is applied. Additionally, the input signal adjusts the frequency of the triangle wave such that the triangle wave is a spread spectrum signal. The triangle wave is compared to a threshold signal to provide a pulse width modulated signal.

Abstract: Audio power amplifier circuits that are arranged to operate in either a class AB or a class D operating mode. A drive circuit is configured to share control between a class AB driver and a class D modulator/driver circuit. The input signal level is monitored to determine their levels. When the input signal level is below a minimum signal level, the audio power amplifier circuits are operated in a standby mode. The power amplifier circuits are operated in a class AB mode when the input signal levels are in a defined operating range that exceeds the minimum signal level. When the input signal levels exceed a maximum signal threshold, the power amplifier circuits are operated in a class D mode. Hysterisis can be employed to minimize oscillation conditions about any one particular trip-point for the operating modes.

Abstract: First and second channel bridge amplifiers are dynamically configured to drive either speakers or headphones. The first channel bridge amplifier includes a first amplifier driving one end of a first speaker through a mechanical switch in a headphone-jack, and a second amplifier driving another end of the first speaker. The second channel bridge amplifier includes third and fourth amplifiers driving respective ends of a second speaker. An amplifier control circuit dynamically detects the insertion or removal of a plug in the jack and configures the amplifiers accordingly. When a plug is inserted into the jack, the mechanical switch disconnects the first speaker from the first amplifier, and the fourth amplifier is tri-stated disconnect the second speaker. The first and third amplifiers are configured to drive the first and second channels of the headphones, while the third amplifier drives the headphone common point (shield ring) as a virtual ground connection.

Abstract: A receiver (22) includes an IF filter (44) and a nearby process-variant circuit (80) formed on a common semiconductor substrate (24). The actual center frequency of the IF filter (44) is determined by resistors (70, 74) and capacitors (72, 76) exhibiting imprecise values and is unlikely to equal a nominal center frequency. The process-variant circuit (80) includes a test resistor (102) and test capacitor (104) formed using the same resistor-forming and capacitor-forming processes used to form the IF filter resistors (70, 74) and capacitors (72, 76). In response a test signal (88) from the process-variant circuit (80) and a reference signal (84) from a process-invariant circuit (82), a tuning parameter for a tunable local oscillator (90) is determined so that a local oscillation signal (94) will exhibit a frequency which, when mixed with an RF signal (38) yields an IF signal (42) at the actual center frequency of the IF filter (44).

Abstract: A filtered reference voltage is provided with improved PSRR without the use of a large capacitor. First and second reference voltages are generated, where the reference voltages are centered about an input reference voltage. A first small valued capacitor circuit samples a selected one of the first and second reference voltages. The selected one is determined by the comparison between the filtered reference voltage and the input reference voltage. A second small valued capacitor circuit is periodically coupled to the first capacitor circuit such that charge redistribution occurs. The overall voltage on the second capacitor circuit is increased when the filtered reference voltage is less than the input reference voltage, or decreased when the filtered reference voltage is greater than the input reference voltage. The voltage from the second capacitor circuit is buffered to provide the filtered reference voltage. The overall system is suitable for an integrated circuit.

Abstract: A receiver (22) includes an IF filter (44) and a nearby process-variant circuit (80) formed on a common semiconductor substrate (24). The actual center frequency of the IF filter (44) is determined by resistors (70, 74) and capacitors (72, 76) exhibiting imprecise values and is unlikely to equal a nominal center frequency. The process-variant circuit (80) includes a test resistor (102) and test capacitor (104) formed using the same resistor-forming and capacitor-forming processes used to form the IF filter resistors (70, 74) and capacitors (72, 76). In response a test signal (88) from the process-variant circuit (80) and a reference signal (84) from a process-invariant circuit (82), a tuning parameter for a tunable local oscillator (90) is determined so that a local oscillation signal (94) will exhibit a frequency which, when mixed with an RF signal (38) yields an IF signal (42) at the actual center frequency of the IF filter (44).

Abstract: An output stage driver circuit comprising two parallel class AB stages running at slightly different quiescent currents, the difference of which is scaled up through a current mirror is disclosed which provides a temperature stable precisely controlled quiescent current for the output stage. A current limited voltage source is provided to ensure inherent short circuit protection with instantaneous response to short circuit or excessive load current conditions.

Abstract: An output stage driver circuit comprising two parallel class AB stages running at slightly different quiescent currents, the difference of which is scaled up through a current mirror is disclosed which provides a temperature stable precisely controlled quiescent current for the output stage. A current limited voltage source is provided to ensure inherent short circuit protection with instantaneous response to short circuit or excessive load current conditions.