Abstract: A method of forming an interconnection between conductive levels is described in which a first conductive level (4) is provided on a surface of a substrate body such as a semiconductor body (1) so that the first conductive level (4) has a contact area (10). Passivating material (6) is provided on the surface of the body (1) to cover the first conductive level (4) and the contact area (10) is then exposed by opening in the passivating material (6) a window (9) larger than the contact area (10) so that there is a gap (11) between the periphery (9a) of the window (9) and a side wall (5a) of the first conductive level (4) bounding the contact area (10). After opening the window (9) material (13b) is provided in the gap (11). Preferably, the material is provided by applying and then solidifying a spin-on-glass and subsequently etching back the spin-on-glass to expose the contact area.

Abstract: A method of manufacturing a semiconductor device comprising a field effect transistor having an insulated gate electrode (11) of doped polycrystalline silicon, which is provided on a surface (5) of a semiconductor substrate (1), in which further source and drain zones (17, 18) of the transistor are formed. The source and drain zones (17, 18) and the gate electrode (11) are provided in a self-registered manner with a top layer of a metal silicide (27). According to the invention, during the formation of the gate electrode (11) in a layer of polycrystalline silicon (7), an etching mask (10) containing silicon nitride is used. Thus, without the gate oxide (6) lying under the layer of polycrystalline silicon (7) being covered with organic residues that can be removed only with difficulty, a gate electrode (11) can be otained with side edges (12) directed transversely to the surface (5).

Abstract: A method of manufacturing a semiconductor device having narrow, coplanar, silicon electrodes which are separated from each other by grooves or slots having a width in the submicron range. The electrodes are alternatively covered by an oxide and by an oxidation-preventing layer, such as silicon nitride. According to the invention, a first and second electrode which are both covered with one of these layers, and which enclose a third electrode covered by the other of these layers, are first interconnected inside a connection region. Two of the three electrodes are separated from the connection region by etching. By selective etching, overlapping contact windows are provided on all three electrodes, and inside the contact windows etching of the groove is omitted.