Patents by Inventor Kazuaki Inukai
Kazuaki Inukai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 7538038Abstract: Disclosed is a method of removing resist preventing increase of dielectric constant of low permittivity insulating films and preventing remains of resist. Using a resist mask, a protection insulating film, a MSQ film, and a silicon oxide film composing an ILD are RIE dry etched sequentially, and a via is formed on the surface of a substrate for processing reaching the diffusion layer on the substrate for processing. Subsequent process consists of; removing a modified layer formed on the substrate for processing surface because of prior etching using plasma gas by plasma excitation of NH3 gas, and another etching for complete removal of the resist mask by irradiation of hydrogen active species created by hydrogen gas and inert gas, of which example is helium gas or argon gas.Type: GrantFiled: February 9, 2005Date of Patent: May 26, 2009Assignee: Sony CorporationInventors: Atsushi Matsushita, Isao Matsumoto, Kazuaki Inukai, Hong Jae Shin, Naofumi Ohashi, Shuji Sone, Kaori Misawa
-
Publication number: 20090011280Abstract: The present invention relates to a magnetic head manufacturing method used for a magnetic storage device. The method includes the steps of forming a first groove in a shape corresponding to an outline of a main magnetic pole on an insulation layer; forming a second groove corresponding to an outline of a main magnetic pole brace layers; inside the outline of the main magnetic pole; and using a plating method to fill the first and second grooves at the same time with a ferromagnetic material and form a main magnetic pole and a main magnetic pole brace layer at the same time.Type: ApplicationFiled: October 19, 2007Publication date: January 8, 2009Applicant: Fujitsu LimitedInventor: Kazuaki Inukai
-
Publication number: 20080213501Abstract: A method of manufacturing a magnetic recording head includes a resist pattern forming step of forming a resist layer that is made of thermoplastic resin and in which a hole is formed in the shape of a main magnetic pole of the magnetic recording head, a hardening treatment step of hardening surfaces of the resist layer; a baking step that heat-bakes the resist layer after the hardening treatment step to temporarily make the resist layer fluid; and a main magnetic pole forming step of forming a main magnetic pole by filling the hole in the resist layer with a material of the main magnetic pole.Type: ApplicationFiled: January 8, 2008Publication date: September 4, 2008Applicant: Fujitsu LimitedInventors: Kazuaki Inukai, Junichi Kon
-
Patent number: 7338897Abstract: A method of fabricating a semiconductor device includes forming a metal wire on a substrate, forming an interlayer insulating film on the metal wire, forming a resist pattern on the interlayer insulating film, selectively etching the interlayer film to form a trench or via-hole in the interlayer insulating film and reaching the metal wire, and ashing, using a reducing gas, to remove the resist pattern.Type: GrantFiled: December 20, 2004Date of Patent: March 4, 2008Assignee: Rohm Co., Ltd.Inventors: Kazuaki Inukai, Atsushi Matsushita
-
Patent number: 7232428Abstract: A sealable access stopcock includes a valve body having a switching part formed in a valve shaft thereof for switching from one flow passage to another; and a main body having an internal chamber in which the valve shaft of the valve body is rotatably fitted, and a plurality of tributary tubes each having a lumen extending therethrough, the lumen opening on a side wall of the internal chamber; the valve body being rotated to selectively bring the lumens into communication with one another through the switching part and thereby switch flow of an infusion fluid from one flow passage to another. A switching channel is provided in the form of an arcuate groove in the switching part of the valve shaft to extend along the circumferential surface thereof.Type: GrantFiled: November 29, 1999Date of Patent: June 19, 2007Assignee: Nippon Sherwood Medical Industries, Ltd.Inventors: Kazuaki Inukai, Susumu Miyasaka, Kazuhiro Abe, Hideyuki Makino
-
Patent number: 7172965Abstract: After forming a stopper film on a semiconductor substrate having a copper wiring layer therein, an interlayer insulating film made of a low dielectric constant material is formed on the stopper film. Then, after forming a capping film on the interlayer insulating film, a resist film having a predetermined pattern is formed on the capping film. The capping film and the interlayer insulating film are etched using the resist film as a mask to form an opening reaching the stopper film. After that, the stopper film exposed by the opening is etched, with the resist film left in place, to form a via hole. Then, the resist film is removed by ashing.Type: GrantFiled: May 20, 2004Date of Patent: February 6, 2007Assignee: Rohm Co., Ltd.Inventors: Kazuaki Inukai, Atsushi Matsushita
-
Patent number: 7169708Abstract: A method of performing microfabrication using a hard mask in the manufacture of a semiconductor device having an interlayer dielectric (ILD) film made of low-dielectric constant, K, insulating material is provided. When treating a low-K dielectric film for use in semiconductor integrated circuitry and its underlying etching stopper film, a patterned resist film is used as a mask to etch a hard mask film. Subsequently, the resist pattern is subjected to stripping or “ashing” in the atmosphere of a mixture gas of hydrogen (H2) and helium (He) at a temperature higher than 200° C. under a pressure of about 1 Torr. With this procedure, microfabrication relying upon the hard mask less in facet is achievable during its subsequent etching of the low-K dielectric film, without damaging the hard mask film upon removal of the resist.Type: GrantFiled: January 19, 2005Date of Patent: January 30, 2007Assignee: Rohm Co., Ltd.Inventor: Kazuaki Inukai
-
Publication number: 20050287811Abstract: A method of performing microfabrication using a hard mask in the manufacture of a semiconductor device having an interlayer dielectric (ILD) film made of low-dielectric constant, K, insulating material is provided. When treating a low-K dielectric film for use in semiconductor integrated circuitry and its underlying etching stopper film, a patterned resist film is used as a mask to etch a hard mask film. Subsequently, the resist pattern is subjected to stripping or “ashing” in the atmosphere of a mixture gas of hydrogen (H2) and helium (He) at a temperature higher than 200° C. under a pressure of about 1 Torr. With this procedure, microfabrication relying upon the hard mask less in facet is achievable during its subsequent etching of the low-K dielectric film, without damaging the hard mask film upon removal of the resist.Type: ApplicationFiled: January 19, 2005Publication date: December 29, 2005Applicant: Semiconductor Leading Edge Technologies, Inc.Inventor: Kazuaki Inukai
-
Publication number: 20050208756Abstract: Disclosed is a method of removing resist preventing increase of dielectric constant of low permittivity insulating films and preventing remains of resist. Using a resist mask, a protection insulating film, a MSQ film, and a silicon oxide film composing an ILD are RIE dry etched sequentially, and a via is formed on the surface of a substrate for processing reaching the diffusion layer on the substrate for processing. Subsequent process consists of; removing a modified layer formed on the substrate for processing surface because of prior etching using plasma gas by plasma excitation of NH3 gas, and another etching for complete removal of the resist mask by irradiation of hydrogen active species created by hydrogen gas and inert gas, of which example is helium gas or argon gas.Type: ApplicationFiled: February 9, 2005Publication date: September 22, 2005Applicant: Semiconductor Leading Edge Technologies, Inc.Inventors: Atsushi Matsushita, Isao Matsumoto, Kazuaki Inukai, Hong Shin, Naofumi Ohashi, Shuji Sone, Kaori Misawa
-
Publication number: 20050199586Abstract: In resist removal using hydrogen gas, the specific dielectric constant of an insulating film of a low dielectric constant can be reduced and the resist removal speed can be increased. A wafer is loaded on a rotary table in a chamber, and hydrogen mixed gas is introduced into a discharge tube from a gas introduction port, and a ? wave is supplied into the discharge tube via a waveguide, and the mixed gas is excited by plasma, and a hydrogen active species is generated. And, a neutral radical (hydrogen radical) of hydrogen atoms or hydrogen molecules is introduced into the chamber from a gas transport pipe and a resist mask on the surface of the wafer is removed. Here, by a substrate heating system for heating the rotary table and controlling the temperature, the temperature of the wafer is set within the range from 200° C. to 400° C. The processed gas after resist removal is ejected from the chamber through a gas ejection port by an exhaust system.Type: ApplicationFiled: February 9, 2005Publication date: September 15, 2005Applicant: Semiconductor Leading Edge Technologies, Inc.Inventors: Atsushi Matsushita, Isao Matsumoto, Kazuaki Inukai, Hong Shin, Naofumi Ohashi, Shuji Sone, Kaori Misawa
-
Publication number: 20050136644Abstract: A method of fabricating a semiconductor device includes forming a metal wire on a substrate, forming an interlayer insulating film on the metal wire, forming a resist pattern on the interlayer insulating film, selectively etching the interlayer film to form a trench or via-hole in the interlayer insulating film and reaching the metal wire, and ashing, using a reducing gas, to remove the resist pattern.Type: ApplicationFiled: December 20, 2004Publication date: June 23, 2005Applicant: Semiconductor Leading Edge Technologies, Inc.Inventors: Kazuaki Inukai, Atsushi Matsushita
-
Publication number: 20040235293Abstract: After forming a stopper film on a semiconductor substrate having a copper wiring layer therein, an interlayer insulating film made of a low dielectric constant material is formed on the stopper film. Then, after forming a capping film on the interlayer insulating film, a resist film having a predetermined pattern is formed on the capping film. The capping film and the interlayer insulating film are etched using the resist film as a mask to form an opening reaching the stopper film. After that, the stopper film exposed by the opening is etched, with the resist film left in place, to form a via hole. Then, the resist film is removed by ashing.Type: ApplicationFiled: May 20, 2004Publication date: November 25, 2004Applicant: Semiconductor Leading Edge Technologies, Inc.Inventors: Kazuaki Inukai, Atsushi Matsushita