Patents by Inventor Kazuaki Katou

Kazuaki Katou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240102688
    Abstract: An indoor unit included in an air conditioner that includes an outdoor unit includes a power receiving circuit (PR2), a low-frequency transmission and reception circuit as a first reception circuit, a high-frequency transmission and reception circuit as a transmission and reception circuit, and an inner-controller. The low-frequency transmission and reception circuit receives a current signal transmitted from an outdoor unit by using a current loop formed by a power line included in power supply wiring. For a first communication state in which physical connection between with the outdoor unit is recognized and a second communication state in which communication for operation of the air conditioner is performed between with the outdoor unit, the inner-controller selects use of the low-frequency transmission and reception circuit and the high-frequency transmission and reception circuit in the first communication state and the second communication state.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 28, 2024
    Applicant: DAIKIN INDUSTRIES, LTD.
    Inventors: Ryosuke YAMAMOTO, Yohei KOYAMA, Youta KATOU, Kazuaki ANDO, Taiki KOGAWA, Shin HIGASHIYAMA, Kosuke HOTTA, Shinichi ISHIZEKI, Toshiaki KUMATA
  • Patent number: 9558832
    Abstract: To maintain constant an output voltage of a boosted voltage circuit even when a program current of a nonvolatile memory increases; in a boosted voltage circuit provided in a semiconductor device, an output voltage of a charge pump is detected by a voltage dividing circuit, and on-off control is performed on an oscillation circuit for driving the charge pump so that the detected output voltage becomes constant. Further, an output current of the charge pump is detected, and a control current according to a magnitude of the detected output current is generated. The control current is fed into or drawn from a coupling node between a plurality of series-coupled resistance elements configuring the voltage dividing circuit.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: January 31, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Kazuaki Katou
  • Publication number: 20160254057
    Abstract: To maintain constant an output voltage of a boosted voltage circuit even when a program current of a nonvolatile memory increases; in a boosted voltage circuit provided in a semiconductor device, an output voltage of a charge pump is detected by a voltage dividing circuit, and on-off control is performed on an oscillation circuit for driving the charge pump so that the detected output voltage becomes constant. Further, an output current of the charge pump is detected, and a control current according to a magnitude of the detected output current is generated. The control current is fed into or drawn from a coupling node between a plurality of series-coupled resistance elements configuring the voltage dividing circuit.
    Type: Application
    Filed: December 2, 2015
    Publication date: September 1, 2016
    Inventor: Kazuaki KATOU
  • Patent number: 6531912
    Abstract: The present invention provides a circuitry comprising: a first circuit for rising a voltage level, the first circuit having an output terminal connected to a high voltage output line for outputting a high voltage output; a comparator having an output terminal connected to an input side of the first circuit, the comparator further having a first input terminal and a second input terminal for receiving a reference voltage; and a voltage dividing circuit connected between the high voltage output line and a low voltage line having a substantially fixed lower potential than the high voltage output line, the voltage dividing circuit having an output node which is connected to the first input terminal of the comparator for outputting a divided voltage output and the voltage dividing circuit having at least a resistance between the output node and the high voltage output line, wherein a parasitic capacitance of the at least resistance between the output node and the high voltage output line is connected to the high v
    Type: Grant
    Filed: February 23, 2001
    Date of Patent: March 11, 2003
    Assignee: NEC Corporation
    Inventor: Kazuaki Katou
  • Publication number: 20010030364
    Abstract: The present invention provides a circuitry comprising: a first circuit for rising a voltage level, the first circuit having an output terminal connected to a high voltage output line for outputting a high voltage output; a comparator having an output terminal connected to an input side of the first circuit, the comparator further having a first input terminal and a second input terminal for receiving a reference voltage; and a voltage dividing circuit connected between the high voltage output line and a low voltage line having a substantially fixed lower potential than the high voltage output line, the voltage dividing circuit having an output node which is connected to the first input terminal of the comparator for outputting a divided voltage output; and the voltage dividing circuit having at least a resistance between the output node and the high voltage output line, wherein a parasitic capacitance of the at least resistance between the output node and the high voltage output line is connected to the high
    Type: Application
    Filed: February 23, 2001
    Publication date: October 18, 2001
    Applicant: NEC CORPORATION
    Inventor: Kazuaki Katou