Patents by Inventor Kazuaki Murota

Kazuaki Murota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180007755
    Abstract: A light-source driving apparatus according to an embodiment includes a power supplying unit, a drive unit, and a controller. The power supplying unit generates a voltage by a step-up operation or a step-down operation to output the voltage to one or more light sources. The drive unit drives the one or more light sources. The controller causes the drive unit to drive the one or more light sources after a set time is elapsed from a start of the operation of the power supplying unit. The controller includes a change unit that changes a length of the set time and/or a rise rate of the voltage during the set time on the basis of states of one or more factors that affect a drop in the voltage.
    Type: Application
    Filed: May 23, 2017
    Publication date: January 4, 2018
    Applicant: FUJITSU TEN LIMITED
    Inventor: Kazuaki MUROTA
  • Patent number: 8379360
    Abstract: An overcurrent protection circuit is provided. An overcurrent detecting element is connected between a power source and a load and detects an overcurrent flowing through the load. A main switch element is connected between the load and the overcurrent detecting element and controls flow of current to the load according to a voltage applied between a control end and an input end of the main switch element. The main switch element stops the flow of current to the load when a predetermined time is elapsed after the overcurrent detecting element detects the overcurrent flowing through the load. A first switch element has an output end connected to the control end of the main switch element. A current flows to the first switch when the overcurrent detecting element detects the overcurrent flowing through the load.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: February 19, 2013
    Assignee: Fujitsu Ten Limited
    Inventor: Kazuaki Murota
  • Patent number: 8058853
    Abstract: A voltage output circuit has a controller controlling ON/OFF switching of a first switch which switches ON/OFF voltage transformation by a first charge pump circuit in order to turning a first voltage outputted from a first voltage output terminal into a desired value, a second charge pump circuit transforming the voltage with the use of an electric power obtained by storing an input voltage according to ON/OFF of the first switch and outputting the voltage as a second voltage, a second switch selecting whether to store the electric power used for transformation by the second charge pump circuit, and a switching unit switching ON/OFF the second switch on the basis of the second voltage outputted from a second voltage output terminal. The circuit having a simple configuration can transform the input voltage and output desired positive and negative voltage, while accomplishing a reduction in cost and size of the circuit.
    Type: Grant
    Filed: November 15, 2007
    Date of Patent: November 15, 2011
    Assignee: Fujitsu Ten Limited
    Inventor: Kazuaki Murota
  • Publication number: 20110075307
    Abstract: An overcurrent protection circuit is provided. An overcurrent detecting element is connected between a power source and a load and detects an overcurrent flowing through the load. A main switch element is connected between the load and the overcurrent detecting element and controls flow of current to the load according to a voltage applied between a control end and an input end of the main switch element. The main switch element stops the flow of current to the load when a predetermined time is elapsed after the overcurrent detecting element detects the overcurrent flowing through the load. A first switch element has an output end connected to the control end of the main switch element. A current flows to the first switch when the overcurrent detecting element detects the overcurrent flowing through the load.
    Type: Application
    Filed: September 28, 2010
    Publication date: March 31, 2011
    Applicant: FUJITSU TEN LIMITED
    Inventor: Kazuaki MUROTA
  • Publication number: 20100045251
    Abstract: A voltage output circuit has a controller controlling ON/OFF switching of a first switch which switches ON/OFF voltage transformation by a first charge pump circuit in order to turning a first voltage outputted from a first voltage output terminal into a desired value, a second charge pump circuit transforming the voltage with the use of an electric power obtained by storing an input voltage according to ON/OFF of the first switch and outputting the voltage as a second voltage, a second switch selecting whether to store the electric power used for transformation by the second charge pump circuit, and a switching unit switching ON/OFF the second switch on the basis of the second voltage outputted from a second voltage output terminal. The circuit having a simple configuration can transform the input voltage and output desired positive and negative voltage, while accomplishing a reduction in cost and size of the circuit.
    Type: Application
    Filed: November 15, 2007
    Publication date: February 25, 2010
    Applicant: Fujitsu Ten Limited
    Inventor: Kazuaki Murota
  • Patent number: 5302908
    Abstract: A modulus counter counts first clock pulses to modulus M and outputs the count value as an m-bit reference signal, M being an integer. A latch circuit samples and holds the reference signal in response to a trigger signal generated by a trigger signal generator in synchronism with an input signal. A high-speed counter is supplied with second clock pulses of a frequency higher than that of the first clock pulses and starts counting the second clock pulses in response to the trigger signal and stops the counting in response to a first one of the first clock pulses immediately thereafter. A data processor converts the n-bit count value of the high-speed counter to n-bit data corresponding to a phase fraction of a phase quantization step in the latch, combines the n-bit data as low-order bits with m-bit data from the latch and outputs the combined data as phase difference data.
    Type: Grant
    Filed: December 22, 1992
    Date of Patent: April 12, 1994
    Assignees: NTT Mobile Communications Network Inc., Nippon Telegraph and Telephone Corporation
    Inventors: Yoshiaki Tarusawa, Toshio Nojima, Kazuaki Murota
  • Patent number: 5166634
    Abstract: In a feed-forward amplifier which has an error detection circuit for detecting a nonlinear distortion component of a main amplifier and an error rejection circuit for amplifying the detected distortion component by an auxiliary amplifier and injecting it into the main amplifier to cancel an error component, a first pilot signal is injected into a signal input path and a second pilot signal is injected into a signal amplification path of the error detection circuit. A first variable attenuator and a first variable phase shifter of the error detection circuit are adjusted by a control circuit so that the level of the first pilot signal component on an error injection path of the error rejection circuit decreases to minimum. A second variable attenuator and a second variable phase shifter of the error rejection circuit are adjusted by the control circuit so that the level of the second pilot signal component on a signal output path decreases to a minimum.
    Type: Grant
    Filed: July 10, 1991
    Date of Patent: November 24, 1992
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Shoichi Narahashi, Toshio Nojima, Makoto Maeta, Kazuaki Murota
  • Patent number: 4817197
    Abstract: Local frequency which is subject to fluctuate in a mobile subscriber set is locked to stable transmit frequency of a base station. A mobile subscriber set (FIG. 3) for angle modulated signal has a frequency mixer (3.6, 3.9), for converting wireless receive frequency to an intermediate frequency by using local frequency (F.sub.L1, F.sub.L2), a limiter (3.11) for limiting amplitude of intermediate frequency signal, a discriminator (3.12) for demodulating angle modulated signal, a standard oscillator (3.1) by using a quartz crystal oscillator and a synthesizer (64) for providing local frequency for said mixer (3.6), a digital frequency counter (3.14) for measuring intermediate frequency, and control means (3.16) for adjusting said standard oscillator (3.1) depending upon error of intermediate frequency measured by said counter (3.14).
    Type: Grant
    Filed: July 13, 1987
    Date of Patent: March 28, 1989
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Isao Shimizu, Katsunori Miyatake, Shuji Urabe, Kazuaki Murota