Patents by Inventor Kazuaki Ohara

Kazuaki Ohara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11868266
    Abstract: Memory bank redistribution based on power consumption of multiple memory banks of a memory die can provide an overall reduced power consumption of a memory device. The respective power consumption of each bank can be determined and memory operations to the banks can be distributed based on the determined power consumption. The memory die can include an interface coupled to each bank. Control circuitry can remap logical to physical addresses of the banks based on one or more parameters such as a power consumption of each bank, counts of memory operations for each bank, and/or a relative physical distance of each bank.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: January 9, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Ji-Hye G Shin, Kazuaki Ohara, Rosa M. Avila-Hernandez, Rachael R. Skreen
  • Patent number: 11650898
    Abstract: An on-die logic analyzer (ODLA) can reduce the time and resources that would otherwise be spent in validating or debugging memory system timings. The ODLA can receive an enable signal with respect to a start command and start a count of clock cycles in response to a first issued command matching the start command defined in a first mode register. The ODLA can stop the count of clock cycles in response to a second issued command matching a stop command defined in a second mode register. The ODLA can write a value indicative of the stopped count to a third mode register or an on-die storage array in response to the stopped count exceeding a previously stored count.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: May 16, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Jackson N. Callaghan, Kazuaki Ohara, Ji-Hye G. Shin, Vyjayanthi Prasad, Rosa M. Avila-Hernandez, Gitanjali T. Ghosh, Rachael R. Skreen
  • Publication number: 20220398026
    Abstract: Memory bank remapping based on sensed temperatures of a memory device can provide an overall reduced power consumption of the memory device. Signaling indicative of sensed temperatures detected by a plurality of temperature sensors within a stack of memory dies of a memory device can be received by address circuitry of the memory device. Based on the sensed temperatures and respective positions of the temperature sensors within the stack of memory dies, a portion of the memory device experiencing an excessive operating temperature can be identified. Logical addresses of a first memory bank of a memory die of the stack of memory dies near or at least partially within the identified portion can be remapped to physical addresses of a second memory bank of the memory die that is further away from the identified portion than the first memory bank.
    Type: Application
    Filed: June 11, 2021
    Publication date: December 15, 2022
    Inventors: Rosa M. Avila-Hernandez, Rachael R. Skreen, Ji-Hye G. Shin, Kazuaki Ohara
  • Publication number: 20220292025
    Abstract: Memory bank redistribution based on power consumption of multiple memory banks of a memory die can provide an overall reduced power consumption of a memory device. The respective power consumption of each bank can be determined and memory operations to the banks can be distributed based on the determined power consumption. The memory die can include an interface coupled to each bank. Control circuitry can remap logical to physical addresses of the banks based on one or more parameters such as a power consumption of each bank, counts of memory operations for each bank, and/or a relative physical distance of each bank.
    Type: Application
    Filed: March 11, 2021
    Publication date: September 15, 2022
    Inventors: Ji-Hye G. Shin, Kazuaki Ohara, Rosa M. Avila-Hernandez, Rachael R. Skreen
  • Publication number: 20220253365
    Abstract: An on-die logic analyzer (ODLA) can reduce the time and resources that would otherwise be spent in validating or debugging memory system timings. The ODLA can receive an enable signal with respect to a start command and start a count of clock cycles in response to a first issued command matching the start command defined in a first mode register. The ODLA can stop the count of clock cycles in response to a second issued command matching a stop command defined in a second mode register. The ODLA can write a value indicative of the stopped count to a third mode register or an on-die storage array in response to the stopped count exceeding a previously stored count.
    Type: Application
    Filed: April 26, 2022
    Publication date: August 11, 2022
    Inventors: Jackson N. Callaghan, Kazuaki Ohara, Ji-Hye G. Shin, Vyjayanthi Prasad, Rosa M. Avila-Hernandez, Gitanjali T. Ghosh, Rachael R. Skreen
  • Patent number: 11327867
    Abstract: An on-die logic analyzer (ODLA) can reduce the time and resources that would otherwise be spent in validating or debugging memory system timings. The ODLA can receive an enable signal with respect to a start command and start a count of clock cycles in response to a first issued command matching the start command defined in a first mode register. The ODLA can stop the count of clock cycles in response to a second issued command matching a stop command defined in a second mode register. The ODLA can write a value indicative of the stopped count to a third mode register or an on-die storage array in response to the stopped count exceeding a previously stored count.
    Type: Grant
    Filed: October 9, 2020
    Date of Patent: May 10, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Jackson N. Callaghan, Kazuaki Ohara, Ji-Hye G. Shin, Vyjayanthi Prasad, Rosa M. Avila-Hernandez, Gitanjali T. Ghosh, Rachael R. Skreen
  • Publication number: 20220113349
    Abstract: An on-die logic analyzer (ODLA) can reduce the time and resources that would otherwise be spent in validating or debugging memory system timings. The ODLA can receive an enable signal with respect to a start command and start a count of clock cycles in response to a first issued command matching the start command defined in a first mode register. The ODLA can stop the count of clock cycles in response to a second issued command matching a stop command defined in a second mode register. The ODLA can write a value indicative of the stopped count to a third mode register or an on-die storage array in response to the stopped count exceeding a previously stored count.
    Type: Application
    Filed: October 9, 2020
    Publication date: April 14, 2022
    Inventors: Jackson N. Callaghan, Kazuaki Ohara, Ji-Hye G. Shin, Vyjayanthi Prasad, Rosa M. Avila-Hernandez, Gitanjali T. Ghosh, Rachael R. Skreen
  • Patent number: 10948166
    Abstract: Hinge devices couple light source units to a base such that the light source units are rotatable around first axes. Each light source unit is rotatable between a first position and a second position around a corresponding first axis of the first axes. Rotation mechanisms couple the light source units to the hinge devices such that the light source units are rotatable around second axes transverse to the first axes. The hinge devices are configured such that when each light source unit rotates from the first position to the second position, rotation directions of the light source units are different. The rotation mechanisms define rotation ranges of the light source units around the second axes to achieve a reference state where the light source units are collected together and light-outgoing surfaces of the light source units face outward when each light source unit is in the first position.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: March 16, 2021
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Kazuaki Ohara, Kazuma Uematsu, Hidekazu Yuasa, Kazuto Toyama, Toshio Kudo
  • Publication number: 20190352659
    Abstract: The present invention relates to a method for producing a useful protein by a plant, including culturing a plant body capable of producing a useful protein in a container while keeping at least a part of the plant body immersed in a liquid medium to allow the plant body to grow. According to the present invention, a useful protein can be stably and efficiently produced by using a plant.
    Type: Application
    Filed: September 29, 2017
    Publication date: November 21, 2019
    Inventors: Kazuaki Ohara, Hiroshi Okawa
  • Publication number: 20190234587
    Abstract: Hinge devices couple light source units to a base such that the light source units are rotatable around first axes. Each light source unit is rotatable between a first position and a second position around a corresponding first axis of the first axes. Rotation mechanisms couple the light source units to the hinge devices such that the light source units are rotatable around second axes transverse to the first axes. The hinge devices are configured such that when each light source unit rotates from the first position to the second position, rotation directions of the light source units are different. The rotation mechanisms define rotation ranges of the light source units around the second axes to achieve a reference state where the light source units are collected together and light-outgoing surfaces of the light source units face outward when each light source unit is in the first position.
    Type: Application
    Filed: August 29, 2017
    Publication date: August 1, 2019
    Inventors: Kazuaki OHARA, Kazuma UEMATSU, Hidekazu YUASA, Kazuto TOYAMA, Toshio KUDO
  • Patent number: D814085
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: March 27, 2018
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Kazuaki Ohara, Kazuma Uematsu
  • Patent number: D851308
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: June 11, 2019
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Kazuaki Ohara, Kazuma Uematsu
  • Patent number: D852396
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: June 25, 2019
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Kazuma Uematsu, Kazuaki Ohara
  • Patent number: D853003
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: July 2, 2019
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Kazuaki Ohara, Kazuma Uematsu
  • Patent number: D853609
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: July 9, 2019
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Kazuma Uematsu, Kazuaki Ohara
  • Patent number: D865304
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: October 29, 2019
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Sho Sugie, Kazuma Uematsu, Kazuaki Ohara