Patents by Inventor Kazuaki Tsutsumi

Kazuaki Tsutsumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230253526
    Abstract: A semiconductor light-emitting element includes a substrate having a first surface, a plurality of protrusions disposed, with spacing opened between one another, on the first surface, a buffer layer disposed to cover the plurality of protrusions and the first surface positioned between the plurality of protrusions, a dimension of the buffer layer in a first direction orthogonal to the first surface being smaller than a dimension in the first direction of each of the plurality of protrusions, an n-type semiconductor layer that is disposed on the buffer layer and is doped with an n-type impurity, an active layer disposed on the n-type semiconductor layer, and a p-type semiconductor layer that is disposed on the active layer and is doped with a p-type impurity.
    Type: Application
    Filed: January 26, 2023
    Publication date: August 10, 2023
    Inventors: Ryosuke Ishimaru, Kazuaki Tsutsumi, Takao Fujimori
  • Patent number: 10529903
    Abstract: A light emitting device includes a light emitting layer, a substrate that is transparent to an emission wavelength of the light emitting layer and positioned to receive an emission wavelength from the light emitting layer, a convex pattern including a collection of a plurality of convex portions discretely arranged on a front surface of the substrate with a first pitch, an n type nitride semiconductor layer located on the front surface of the substrate to cover the convex pattern and a p type nitride semiconductor layer located on the light emitting layer. The light emitting layer is located on the n type semiconductor layer. Each of the convex portions includes a sub convex pattern comprising a plurality of fine convex portions discretely formed at the top of the convex portion with a second pitch smaller than the first pitch, and a base supporting the sub convex pattern.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: January 7, 2020
    Assignee: ROHM CO., LTD.
    Inventors: Nobuaki Matsui, Hirotaka Obuchi, Yasuo Nakanishi, Kazuaki Tsutsumi, Takao Fujimori
  • Patent number: 10497831
    Abstract: A semiconductor light emitting element is disclosed. The element includes a substrate including a first surface, a second surface opposite to the first surface, and a side surface that connects the first surface and the second surface; a semiconductor layer formed on the first surface of the substrate and configured to generate light; and a light reflective layer formed on the second surface of the substrate to cover an entire region of the second surface of the substrate and configured to reflect the light generated by the semiconductor layer toward the semiconductor layer. A modified layer, which has a physical property different from that of the other portion of the substrate, is formed on the side surface of the substrate to be spaced apart from the first surface toward the second surface by altering a material forming the substrate.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: December 3, 2019
    Assignee: ROHM CO., LTD.
    Inventors: Hirotaka Obuchi, Kazuaki Tsutsumi, Hideaki Anzai, Takao Fujimori
  • Patent number: 10263150
    Abstract: A semiconductor light emitting device includes a substrate having a first major surface and a second major surface, a semiconductor layer that includes a first semiconductor layer of a first conductive type formed on the first major surface of the substrate, a light emitting layer formed on the first semiconductor layer and a second semiconductor layer of a second conductive type formed on the light emitting layer, and a mesa structure formed in the semiconductor layer by selectively notching the first semiconductor layer, the light emitting layer and the second semiconductor layer so as to expose the first semiconductor layer, and a ratio of a luminescent area of the light emitting Layer with respect to an area of the first major surface of the substrate being set to equal to or smaller than 0.25.
    Type: Grant
    Filed: May 4, 2017
    Date of Patent: April 16, 2019
    Assignee: ROHM CO., LTD.
    Inventors: Takao Fujimori, Kazuaki Tsutsumi, Hirotaka Obuchi
  • Patent number: 9991430
    Abstract: A light emitting device includes a light emitting layer, a substrate that is transparent to an emission wavelength of the light emitting layer and positioned to receive an emission wavelength from the light emitting layer, a convex pattern including a collection of a plurality of convex portions discretely arranged on a front surface of the substrate with a first pitch, an n type nitride semiconductor layer located on the front surface of the substrate to cover the convex pattern and a p type nitride semiconductor layer located on the light emitting layer. The light emitting layer is located on the n type semiconductor layer. Each of the convex portions includes a sub convex pattern comprising a plurality of fine convex portions discretely formed at the top of the convex portion with a second pitch smaller than the first pitch, and a base supporting the sub convex pattern.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: June 5, 2018
    Assignee: ROHM CO., LTD.
    Inventors: Nobuaki Matsui, Hirotaka Obuchi, Yasuo Nakanishi, Kazuaki Tsutsumi, Takao Fujimori
  • Publication number: 20180083172
    Abstract: A light emitting device includes a light emitting layer, a substrate that is transparent to an emission wavelength of the light emitting layer and positioned to receive an emission wavelength from the light emitting layer, a convex pattern including a collection of a plurality of convex portions discretely arranged on a front surface of the substrate with a first pitch, an n type nitride semiconductor layer located on the front surface of the substrate to cover the convex pattern and a p type nitride semiconductor layer located on the light emitting layer. The light emitting layer is located on the n type semiconductor layer. Each of the convex portions includes a sub convex pattern comprising a plurality of fine convex portions discretely formed at the top of the convex portion with a second pitch smaller than the first pitch, and a base supporting the sub convex pattern.
    Type: Application
    Filed: November 29, 2017
    Publication date: March 22, 2018
    Applicant: ROHM CO., LTD.
    Inventors: Nobuaki MATSUI, Hirotaka OBUCHI, Yasuo NAKANISHI, Kazuaki TSUTSUMI, Takao FUJIMORI
  • Patent number: 9876137
    Abstract: A semiconductor light emitting device includes: an n-type layer; a p-type layer; and an emission layer interposed between the n-type layer and the p-type layer and having a multiple quantum well (MQW) structure in which barrier layers and quantum well layers are alternately stacked over a plurality of periods, wherein n-type impurity concentrations of the barrier layers disposed up to a predetermined ?-th layer (where ? is a natural number), when counting from the p-type layer, are smaller than an n-type impurity concentration of the barrier layer disposed at an (?+1)-th layer counting from the p-type layer.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: January 23, 2018
    Assignee: ROHM CO., LTD.
    Inventors: Hirotaka Obuchi, Kazuaki Tsutsumi
  • Publication number: 20170352781
    Abstract: A semiconductor light emitting element is disclosed. The element includes a substrate including a first surface, a second surface opposite to the first surface, and a side surface that connects the first surface and the second surface; a semiconductor layer formed on the first surface of the substrate and configured to generate light; and a light reflective layer formed on the second surface of the substrate to cover an entire region of the second surface of the substrate and configured to reflect the light generated by the semiconductor layer toward the semiconductor layer. A modified layer, which has a physical property different from that of the other portion of the substrate, is formed on the side surface of the substrate to be spaced apart from the first surface toward the second surface by altering a material forming the substrate.
    Type: Application
    Filed: June 1, 2017
    Publication date: December 7, 2017
    Applicant: ROHM CO., LTD.
    Inventors: Hirotaka OBUCHI, Kazuaki TSUTSUMI, Hideaki ANZAI, Takao FUJIMORI
  • Publication number: 20170331004
    Abstract: A semiconductor light emitting device includes a substrate having a first major surface and a second major surface, a semiconductor layer that includes a first semiconductor layer of a first conductive type formed on the first major surface of the substrate, a light emitting layer formed on the first semiconductor layer and a second semiconductor layer of a second conductive type formed on the light emitting layer, and a mesa structure formed in the semiconductor layer by selectively notching the first semiconductor layer, the light emitting layer and the second semiconductor layer so as to expose the first semiconductor layer, and a ratio of a luminescent area of the light emitting layer with respect to an area of the first major surface of the substrate being set to equal to or smaller than 0.25.
    Type: Application
    Filed: May 4, 2017
    Publication date: November 16, 2017
    Applicant: ROHM CO., LTD.
    Inventors: Takao FUJIMORI, Kazuaki TSUTSUMI, Hirotaka OBUCHI
  • Publication number: 20160343900
    Abstract: A semiconductor light emitting device includes: an n-type layer; a p-type layer; and an emission layer interposed between the n-type layer and the p-type layer and having a multiple quantum well (MQW) structure in which barrier layers and quantum well layers are alternately stacked over a plurality of periods, wherein n-type impurity concentrations of the barrier layers disposed up to a predetermined ?-th layer (where a is a natural number), when counting from the p-type layer, are smaller than an n-type impurity concentration of the barrier layer disposed at an (?+1)-th layer counting from the p-type layer.
    Type: Application
    Filed: May 13, 2016
    Publication date: November 24, 2016
    Applicant: ROHM CO., LTD.
    Inventors: Hirotaka OBUCHI, Kazuaki TSUTSUMI
  • Publication number: 20160181489
    Abstract: A light emitting device includes a light emitting layer, a substrate that is transparent to an emission wavelength of the light emitting layer and positioned to receive an emission wavelength from the light emitting layer, a convex pattern including a collection of a plurality of convex portions discretely arranged on a front surface of the substrate with a first pitch, an n type nitride semiconductor layer located on the front surface of the substrate to cover the convex pattern and a p type nitride semiconductor layer located on the light emitting layer. The light emitting layer is located on the n type semiconductor layer. Each of the convex portions includes a sub convex pattern comprising a plurality of fine convex portions discretely formed at the top of the convex portion with a second pitch smaller than the first pitch, and a base supporting the sub convex pattern.
    Type: Application
    Filed: February 25, 2016
    Publication date: June 23, 2016
    Applicant: ROHM CO., LTD.
    Inventors: Nobuaki MATSUI, Hirotaka OBUCHI, Yasuo NAKANISHI, Kazuaki TSUTSUMI, Takao FUJIMORI
  • Patent number: 9281444
    Abstract: A light emitting device includes a light emitting layer, a substrate that is transparent to an emission wavelength of the light emitting layer and positioned to receive an emission wavelength from the light emitting layer, a convex pattern including a collection of a plurality of convex portions discretely arranged on a front surface of the substrate with a first pitch, an n type nitride semiconductor layer located on the front surface of the substrate to cover the convex pattern and a p type nitride semiconductor layer located on the light emitting layer. The light emitting layer is located on the n type semiconductor layer. Each of the convex portions includes a sub convex pattern comprising a plurality of fine convex portions discretely formed at the top of the convex portion with a second pitch smaller than the first pitch, and a base supporting the sub convex pattern.
    Type: Grant
    Filed: March 10, 2014
    Date of Patent: March 8, 2016
    Assignee: ROHM CO., LTD.
    Inventors: Nobuaki Matsui, Hirotaka Obuchi, Yasuo Nakanishi, Kazuaki Tsutsumi, Takao Fujimori
  • Publication number: 20140191270
    Abstract: A light emitting device includes a light emitting layer, a substrate that is transparent to an emission wavelength of the light emitting layer and positioned to receive an emission wavelength from the light emitting layer, a convex pattern including a collection of a plurality of convex portions discretely arranged on a front surface of the substrate with a first pitch, an n type nitride semiconductor layer located on the front surface of the substrate to cover the convex pattern and a p type nitride semiconductor layer located on the light emitting layer. The light emitting layer is located on the n type semiconductor layer. Each of the convex portions includes a sub convex pattern comprising a plurality of fine convex portions discretely formed at the top of the convex portion with a second pitch smaller than the first pitch, and a base supporting the sub convex pattern.
    Type: Application
    Filed: March 10, 2014
    Publication date: July 10, 2014
    Applicant: ROHM CO., LTD.
    Inventors: Nobuaki MATSUI, Hirotaka OBUCHI, Yasuo NAKANISHI, Kazuaki TSUTSUMI, Takao FUJIMORI
  • Patent number: 8686433
    Abstract: A light emitting device includes a light emitting layer, a substrate that is transparent to an emission wavelength of the light emitting layer and positioned to receive an emission wavelength from the light emitting layer, a convex pattern including a collection of a plurality of convex portions discretely arranged on a front surface of the substrate with a first pitch, an n type nitride semiconductor layer located on the front surface of the substrate to cover the convex pattern and a p type nitride semiconductor layer located on the light emitting layer. The light emitting layer is located on the n type semiconductor layer. Each of the convex portions includes a sub convex pattern comprising a plurality of fine convex portions discretely formed at the top of the convex portion with a second pitch smaller than the first pitch, and a base supporting the sub convex pattern.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: April 1, 2014
    Assignee: Rohm Co., Ltd.
    Inventors: Nobuaki Matsui, Hirotaka Obuchi, Yasuo Nakanishi, Kazuaki Tsutsumi, Takao Fujimori
  • Patent number: 8415682
    Abstract: A semiconductor light emitting device and a fabrication method for the semiconductor light emitting device whose outward luminous efficiency improved are provided and the semiconductor light emitting device includes a substrate; a protective film placed on the substrate; an n-type semiconductor layer which is placed on the substrate pinched by a protective film and on the protective film, and is doped with an n-type impurity; an active layer placed on the n-type semiconductor layer, and a p-type semiconductor layer placed on the active layer and is doped with a p-type impurity.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: April 9, 2013
    Assignee: Rohm Co., Ltd.
    Inventors: Yasuo Nakanishi, Masayuki Sonobe, Kazuaki Tsutsumi
  • Publication number: 20130056748
    Abstract: A light emitting device includes a light emitting layer, a substrate that is transparent to an emission wavelength of the light emitting layer and positioned to receive an emission wavelength from the light emitting layer, a convex pattern including a collection of a plurality of convex portions discretely arranged on a front surface of the substrate with a first pitch, an n type nitride semiconductor layer located on the front surface of the substrate to cover the convex pattern and a p type nitride semiconductor layer located on the light emitting layer. The light emitting layer is located on the n type semiconductor layer. Each of the convex portions includes a sub convex pattern comprising a plurality of fine convex portions discretely formed at the top of the convex portion with a second pitch smaller than the first pitch, and a base supporting the sub convex pattern.
    Type: Application
    Filed: August 31, 2012
    Publication date: March 7, 2013
    Applicant: ROHM CO., LTD.
    Inventors: Nobuaki MATSUI, Hirotaka Obuchi, Yasuo Nakanishi, Kazuaki Tsutsumi, Takao Fujimori
  • Patent number: 8222655
    Abstract: A semiconductor light emitting device of the present invention includes a substrate (1), an n-GaN layer (2) supported by the substrate (1), a p-GaN layer (7) which is located farther from the substrate (1) than the n-GaN layer (2) is, an active layer (4) formed between the n-GaN layer (2) and the p-GaN layer (7) and containing InGaN, a sublimation preventing layer (5) formed between the active layer (4) and the p-GaN layer (7) and containing InGaN, and an In composition gradient layer (6) sandwiched between the sublimation preventing layer (5) and the p-GaN layer (7) and having such In composition ratio gradient that the In composition ratio decreases in the thickness direction toward the p-GaN layer (7).
    Type: Grant
    Filed: February 8, 2007
    Date of Patent: July 17, 2012
    Assignee: Rohm Co., Ltd.
    Inventors: Kazuaki Tsutsumi, Norikazu Ito, Masayuki Sonobe, Shinichi Tamai
  • Patent number: 8053756
    Abstract: Provided is a nitride semiconductor light emitting element having an improved carrier injection efficiency from a p-type nitride semiconductor layer to an active layer by simple means from a viewpoint utterly different from the prior art. A buffer layer 2, an undoped GaN layer 3, an n-type GaN contact layer 4, an InGaN/GaN superlattice layer 5, an active layer 6, a first undoped InGaN layer 7, a second undoped InGaN layer 8, and a p-type Gan-based contact layer 9 are stacked on a sapphire substrate 1. A p-electrode 10 is formed on the p-type Gan-based contact layer 9. An n-electrode 11 is formed on a surface where the n-type GaN contact layer 4 is exposed as a result of mesa-etching. The first undoped InGaN layer 7 is formed to contact a well layer closest to a p-side in the active layer having a quantum well structure, and subsequently the second undoped InGaN layer 8 is formed thereon.
    Type: Grant
    Filed: May 26, 2006
    Date of Patent: November 8, 2011
    Assignee: Rohm Co., Ltd.
    Inventors: Ken Nakahara, Norikazu Ito, Kazuaki Tsutsumi
  • Publication number: 20100102341
    Abstract: A semiconductor light emitting device includes: a transparent substrate including a first principal surface and a second principal surface opposite with the first principal surface, in which side surfaces between the first principal surface and the second principal surface are rough surfaces; and a semiconductor light emitting element that is arranged on the first principal surface of the transparent substrate and is composed by stacking nitride semiconductors on each other.
    Type: Application
    Filed: June 3, 2008
    Publication date: April 29, 2010
    Applicant: ROHM CO., LTD.
    Inventors: Kazuaki Tsutsumi, Yohei Ito, Yasuo Nakanishi, Shunji Nakata
  • Publication number: 20100065812
    Abstract: Provided is a nitride semiconductor light emitting element having an improved carrier injection efficiency from a p-type nitride semiconductor layer to an active layer by simple means from a viewpoint utterly different from the prior art. A buffer layer 2, an undoped GaN layer 3, an n-type GaN contact layer 4, an InGaN/GaN superlattice layer 5, an active layer 6, an undoped InGaN layer 7, and a p-type GaN-based contact layer 8 are stacked on a sapphire substrate 1. A p-electrode 9 is formed on the p-type GaN-based contact layer 8. An n-electrode 10 is formed on a surface where the n-type GaN contact layer 4 is exposed as a result of mesa-etching. The undoped InGaN layer 7 is included in an intermediate semiconductor layer formed between the p-type GaN-based contact layer 8 and a well layer closest to a p-side in the active layer having a quantum well structure.
    Type: Application
    Filed: May 26, 2006
    Publication date: March 18, 2010
    Applicant: ROHM CO., LTD.
    Inventors: Ken Nakahara, Norikazu Ito, Kazuaki Tsutsumi