Patents by Inventor Kazue Chida

Kazue Chida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11314664
    Abstract: A memory access device includes: a data processor configured to output an access request requesting access to a memory connected to a data bus, perform a data processing on data in the accessed memory, and provide notification of a progress status of the data processing; a priority switching control part configured to determine an urgency of the data processing by the data processor according to the progress status of the data processing notified from the data processor, and output a priority switching signal notifying switching of a priority of the data processor; and a bus arbiter connected to the data bus, configured to change the priority of the data processor according to the priority switching signal to arbitrate the access request output from the data processor, and control access to the memory according to the access request that has been arbitrated.
    Type: Grant
    Filed: February 20, 2020
    Date of Patent: April 26, 2022
    Assignee: OLYMPUS CORPORATION
    Inventors: Shinsuke Homma, Kazue Chida, Akira Ueno
  • Publication number: 20200192830
    Abstract: A memory access device includes: a data processor configured to output an access request requesting access to a memory connected to a data bus, perform a data processing on data in the accessed memory, and provide notification of a progress status of the data processing; a priority switching control part configured to determine an urgency of the data processing by the data processor according to the progress status of the data processing notified from the data processor, and output a priority switching signal notifying switching of a priority of the data processor; and a bus arbiter connected to the data bus, configured to change the priority of the data processor according to the priority switching signal to arbitrate the access request output from the data processor, and control access to the memory according to the access request that has been arbitrated.
    Type: Application
    Filed: February 20, 2020
    Publication date: June 18, 2020
    Applicant: OLYMPUS CORPORATION
    Inventors: Shinsuke Homma, Kazue Chida, Akira Ueno
  • Patent number: 9830675
    Abstract: An image-processing apparatus includes a memory in which first image data is recorded, wherein the first image data includes second image data an offset-calculating block configured to calculate an offset when transfer data is read for each row, wherein an amount of position gap between a storage area of data of a first row of the first image data and a storage area of data of a second row includes the offset and wherein the access boundary is a boundary of data capable of being accessed through one access to the memory, a write block configured to write the first image data, a write control block configured to control the write block, a read block configured to read the second image data, a read control block configured to control the read block, and an image-processing block configured to perform image processing on the second image data.
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: November 28, 2017
    Assignee: OLYMPUS CORPORATION
    Inventor: Kazue Chida
  • Patent number: 9798305
    Abstract: A calculation device includes a plurality of calculation processing units configured to perform different processes with each other, a plurality of calculators configured to perform a same calculation, and a control unit configured to control a number of the calculators to be operated during each of a plurality of divided periods based on a length of a predetermined processing period and a number of calculations to be performed, such that a number of data which is equal to a number of calculations is processed within a predetermined processing period, and that the number of the calculators to be operated during each of the plurality of divided periods is averaged, the divided periods being obtained by dividing up the predetermined processing period.
    Type: Grant
    Filed: November 10, 2014
    Date of Patent: October 24, 2017
    Assignee: OLYMPUS CORPORATION
    Inventors: Kazue Chida, Akira Ueno
  • Publication number: 20160210715
    Abstract: An image-processing apparatus includes a memory in which first image data is recorded, wherein the first image data includes second image data offset-calculating block configured to calculate an offset when transfer data is read for each row, wherein an amount of position gap between a storage area of data of a first row of the first image data and a storage area of data of a second row includes the offset and wherein the access boundary is a boundary of data capable of being accessed through one access to the memory, a write block configured to write the first image data, a write control block configured to control the write block, a read block configured to read the second image data, a read control block configured to control the read block, and an image-processing block configured to perform image processing on the second image data.
    Type: Application
    Filed: January 19, 2016
    Publication date: July 21, 2016
    Applicant: OLYMPUS CORPORATION
    Inventor: Kazue Chida
  • Publication number: 20150142136
    Abstract: A calculation device includes a plurality of calculation processing units configured to perform different processes with each other, a plurality of calculators configured to perform a same calculation, and a control unit configured to control a number of the calculators to be operated during each of a plurality of divided periods based on a length of a predetermined processing period and a number of calculations to be performed, such that a number of data which is equal to a number of calculations is processed within a predetermined processing period, and that the number of the calculators to be operated during each of the plurality of divided periods is averaged, the divided periods being obtained by dividing up the predetermined processing period.
    Type: Application
    Filed: November 10, 2014
    Publication date: May 21, 2015
    Applicant: OLYMPUS CORPORATION
    Inventors: Kazue Chida, Akira Ueno