Abstract: A semiconductor memory card includes a lead frame having external connection terminals, a controller chip mounted on the lead frame and a memory chip mounted on the lead frame. The lead frame, the controller chip, and the memory chip are sealed with a sealing resin layer that has a surface at which the external connection terminals are exposed and a recess surrounding the external connection terminals.

Abstract: According to one embodiment, a semiconductor storage device is provided with a memory chip including a storage circuit, a controller chip that controls a memory chip, and a substrate having a first surface and a second surface opposing one another, on the first surface of which the controller chip is mounted. Further, the semiconductor storage device is provided with an external connection terminal formed on the second surface of the substrate, and resin that encapsulates the memory chip, the controller chip, and the substrate, includes a third surface and a fourth surface opposing one another, and has a predetermined mark directly printed only on the fourth surface that is adjacent to the second surface of the substrate.

Abstract: According to one embodiment, a semiconductor device includes a housing, a board in the housing, a semiconductor component on the board, a controller on the board, a first terminal, and a second terminal. The first terminal is exposed to an outside of the housing and electrically connected to the semiconductor component via the controller. The second terminal is on the board in the housing and is electrically connected to the semiconductor component.

Abstract: A semiconductor memory card includes a lead frame having external connection terminals, a controller chip mounted on the lead frame and a memory chip mounted on the lead frame. The lead frame, the controller chip, and the memory chip are sealed with a sealing resin layer that has a surface at which the external connection terminals are exposed and a recess surrounding the external connection terminals.

Abstract: In an embodiment, a semiconductor memory card includes a lead frame including external connection terminals, a lead portion, a chip component mounting portion and a semiconductor chip mounting portion, a chip component mounted on the chip component mounting portion, a memory chip disposed on the semiconductor chip mounting portion, and a controller chip. A rewiring layer is formed on a surface of the memory chip. The lead frame is resin-sealed. An electric circuit of the controller chip and the memory chip on the lead frame is formed by the lead portion, the rewiring layer and a metal wire connected to electrode pad of the chips, the lead portion, and the rewiring layer.

Abstract: According to one embodiment, a semiconductor storage device is provided with a memory chip including a storage circuit, a controller chip that controls a memory chip, and a substrate having a first surface and a second surface opposing one another, on the first surface of which the controller chip is mounted. Further, the semiconductor storage device is provided with an external connection terminal formed on the second surface of the substrate, and resin that encapsulates the memory chip, the controller chip, and the substrate, includes a third surface and a fourth surface opposing one another, and has a predetermined mark directly printed only on the fourth surface that is adjacent to the second surface of the substrate.

Abstract: In an embodiment, a semiconductor memory card includes a lead frame including external connection terminals, a lead portion, a chip component mounting portion and a semiconductor chip mounting portion, a chip component mounted on the chip component mounting portion, a memory chip disposed on the semiconductor chip mounting portion, and a controller chip. A rewiring layer is formed on a surface of the memory chip. The lead frame is resin-sealed. An electric circuit of the controller chip and the memory chip on the lead frame is formed by the lead portion, the rewiring layer and a metal wire connected to electrode pad of the chips, the lead portion, and the rewiring layer.

Abstract: Process gas is fed from a gas supply means to a plasma generating means in a vacuum chamber, and hydrogen-containing plasma is generated by the plasma generating means under a low pressure. A soft solder alloy on the surface of a workpiece supported by a workpiece exposing means is exposed to the hydrogen-containing plasma so that the soft solder alloy is irradiated with the hydrogen-containing plasma. Either simultaneously with or immediately after the plasma irradiation, the soft solder alloy undergoes reflow treatment in a vacuum by a heating means. As no flux is used, there is no need of a washing process, and the bump-shaped electrode terminals produced by using the inexpensive soft solder alloy on the surface of the workpiece have great reliability.

Abstract: Process gas is fed from a gas supply means to a plasma generating means in a vacuum chamber, and hydrogen-containing plasma is generated by the plasma generating means under a low pressure. A soft solder alloy on the surface of a workpiece supported by a workpiece exposing means is exposed to the hydrogen-containing plasma so that the soft solder alloy is irradiated with the hydrogen-containing plasma. Either simultaneously with or immediately after the plasma irradiation, the soft solder alloy undergoes reflow treatment in a vacuum by a heating means. As no flux is used, there is no need of a washing process, and the bump-shaped electrode terminals produced by using the inexpensive soft solder alloy on the surface of the workpiece have great reliability.

Abstract: Process gas is fed from a gas supply means to a plasma generating means in a vacuum chamber, and hydrogen-containing plasma is generated by the plasma generating means under a low pressure. A soft solder alloy on the surface of a workpiece supported by a workpiece exposing means is exposed to the hydrogen-containing plasma so that the soft solder alloy is irradiated with the hydrogen-containing plasma. Either simultaneously with or immediately after the plasma irradiation, the soft solder alloy undergoes reflow treatment in a vacuum by a heating means. As no flux is used, there is no need of a washing process, and the bump-shaped electrode terminals produced by using the inexpensive soft solder alloy on the surface of the workpiece have great reliability.

Abstract: A first insulating film is formed on an integrated circuit chip on which an I/O pad is formed. A first opening portion is formed above the I/O pad. A conductive layer and a barrier metal layer which are electrically connected to the I/O pad through the first opening portion are stacked on the first insulating film. The conductive layer and the barrier metal layer are patterned by a single mask. A second insulating film is formed on the resultant structure. A second opening portion is formed in the second insulating film at a position different from that of the first opening portion. A solder bump or metal pad is formed on the barrier metal layer in the second opening portion. The position of the solder bump or metal pad is defined by the second opening portion.

Abstract: In a flip chip mounting type semiconductor device, on a corner portion of a chip subjected to flip chip mounting, a gate region for injecting a sealing member filled between a mounted board and the chip is arranged. In this semiconductor device, a semiconductor element has a plurality of bumps formed on the peripheral portion on a major surface along each side, a plurality of pad electrodes are formed on the major surface of the circuit board, and the pad electrodes join the bumps. A resin sealing member is filled between the semiconductor element and the circuit board. A gate region through which the resin sealing member is injected is formed on a corner portion of the semiconductor element. In the gate region, no bump is formed, or bumps are arranged at intervals smaller than that in another region. For this reason, the resin uniformly enters the space between the semiconductor element and the circuit board through the gate region.

Abstract: An Al layer which serves as a lead-out electrode is formed on a semiconductor chip. An insulating layer is formed on the semiconductor chip and the Al layer. The insulating layer has an opening formed in that portion thereof which is located on the Al layer, thereby exposing a portion of the Al layer. A multi-level metal layer (barrier metal layer) is formed on the exposed portion of the Al layer and on that portion of the insulating layer which is located along the edge of the opening. A metallic nitride region is provided between a first-level metal layer in the multi-level metal layer and the insulating layer so as to be selectively formed at or under a peripheral portion of the first-level metal layer. A bump electrode is provided on the multi-level metal layer. The resultant semiconductor device is mounted on a circuit board by flip chip bonding, with the bump electrode interposed therebetween.

Abstract: A semiconductor device according to the present invention includes a resistant heating element as a temperature regulation means on a circuit board. A semiconductor chip of the device is connected to the circuit board through connecting electrodes. A difference in temperature between the semiconductor chip and circuit board is kept at a fixed value by controlling the resistant heating element.

Abstract: A semiconductor device includes a semiconductor chip which is connected to a circuit substrate via solder bumps by flip-chip connection, a first encapsulant having a large Young's modulus and filling a space between the semiconductor chip and the circuit substrate in the central portion of the semiconductor chip, and a second encapsulant having a small Young's modulus and filling a space between the semiconductor chip and the circuit substrate in the peripheral portion of the semiconductor chip. A method for manufacturing the semiconductor device includes flowing the second encapsulant into position, but not the first encapsulant.

Abstract: A semiconductor device includes a rectangular wiring substrate and a plurality of semiconductor elements having connecting electrodes such as projecting electrodes connected to the wiring substrate. Even though the wiring substrate is deformed, the semiconductor elements and connecting electrodes are prevented from being broken, thereby maintaining the reliability of the semiconductor device for a long period of time. A buffer region constituted by grooves is formed in that middle part of the undersurface of the rectangular wiring substrate which is located between both the long sides of the wiring substrate and between both the short sides thereof. The semiconductor elements are formed outside the buffer region. The connecting electrodes of the semiconductor elements are connected to a wiring pattern on the surface of the wiring substrate, with the result that the semiconductor elements are mounted on the wiring substrate.