Patents by Inventor Kazuhide FUKAYA

Kazuhide FUKAYA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11594489
    Abstract: An interlayer insulating film has via holes. A sidewall conductive layer is arranged along a sidewall surface of one via hole and contains one or more kinds selected from a group including tungsten, titanium, titanium nitride, tantalum and molybdenum. A second metal wiring layer is embedded in one via hole and contains aluminum. A plug layer is embedded in the other via hole and contains one or more kinds selected from the group including tungsten, titanium, titanium nitride, tantalum and molybdenum.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: February 28, 2023
    Assignee: Renesas Electronics Corporation
    Inventors: Toshikazu Hanawa, Kazuhide Fukaya, Makoto Koshimizu
  • Publication number: 20200066646
    Abstract: An interlayer insulating film has via holes. A sidewall conductive layer is arranged along a sidewall surface of one via hole and contains one or more kinds selected from a group including tungsten, titanium, titanium nitride, tantalum and molybdenum. A second metal wiring layer is embedded in one via hole and contains aluminum. A plug layer is embedded in the other via hole and contains one or more kinds selected from the group including tungsten, titanium, titanium nitride, tantalum and molybdenum.
    Type: Application
    Filed: October 30, 2019
    Publication date: February 27, 2020
    Inventors: Toshikazu HANAWA, Kazuhide FUKAYA, Makoto KOSHIMIZU
  • Patent number: 9935023
    Abstract: A via hole is accurately formed in an interlayer insulating film over a metal wiring. Of emission spectra of plasma to be used for dry etching of the interlayer insulating film, the emission intensities of at least CO, CN, and AlF are monitored such that an end point of the dry etching of the interlayer insulating film is detected based on the emission intensities thereof.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: April 3, 2018
    Assignee: Renesas Electronics Corporation
    Inventors: Toshikazu Hanawa, Kazuhide Fukaya, Kentaro Yamada
  • Publication number: 20180061769
    Abstract: An interlayer insulating film has via holes. A sidewall conductive layer is arranged along a sidewall surface of one via hole and contains one or more kinds selected from a group including tungsten, titanium, titanium nitride, tantalum and molybdenum. A second metal wiring layer is embedded in one via hole and contains aluminum. A plug layer is embedded in the other via hole and contains one or more kinds selected from the group including tungsten, titanium, titanium nitride, tantalum and molybdenum.
    Type: Application
    Filed: June 30, 2017
    Publication date: March 1, 2018
    Inventors: Toshikazu HANAWA, Kazuhide FUKAYA, Makoto KOSHIMIZU
  • Publication number: 20170287794
    Abstract: A via hole is accurately formed in an interlayer insulating film over a metal wiring. Of emission spectra of plasma to be used for dry etching of the interlayer insulating film, the emission intensities of at least CO, CN, and AlF are monitored such that an end point of the dry etching of the interlayer insulating film is detected based on the emission intensities thereof.
    Type: Application
    Filed: June 22, 2017
    Publication date: October 5, 2017
    Applicant: Renesas Electronics Corporation
    Inventors: Toshikazu HANAWA, Kazuhide FUKAYA, Kentaro YAMADA
  • Patent number: 9711423
    Abstract: A via hole is accurately formed in an interlayer insulating film over a metal wiring. Of emission spectra of plasma to be used for dry etching of the interlayer insulating film, the emission intensities of at least CO, CN, and AlF are monitored such that an end point of the dry etching of the interlayer insulating film is detected based on the emission intensities thereof.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: July 18, 2017
    Assignee: Renesas Electronics Corporation
    Inventors: Toshikazu Hanawa, Kazuhide Fukaya, Kentaro Yamada
  • Patent number: 9595468
    Abstract: To provide a semiconductor device having improved reliability. After formation of a first insulating film for an interlayer insulating film by spin coating, the surface of the first insulating film is subjected to a hydrophilicity improving treatment. A second insulating film for the interlayer insulating film is then formed on the first insulating film by spin coating. The interlayer insulating film is comprised of a stacked insulating film including the first insulating film and the second insulating film thereon. The interlayer insulating film therefore can have improved surface flatness.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: March 14, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Toshikazu Hanawa, Kazuhide Fukaya
  • Publication number: 20170062288
    Abstract: A via hole is accurately formed in an interlayer insulating film over a metal wiring. Of emission spectra of plasma to be used for dry etching of the interlayer insulating film, the emission intensities of at least CO, CN, and AlF are monitored such that an end point of the dry etching of the interlayer insulating film is detected based on the emission intensities thereof.
    Type: Application
    Filed: July 8, 2016
    Publication date: March 2, 2017
    Applicant: Renesas Electronics Corporation
    Inventors: Toshikazu HANAWA, Kazuhide FUKAYA, Kentaro YAMADA
  • Publication number: 20160254143
    Abstract: To provide a semiconductor device having improved reliability. After formation of a first insulating film for an interlayer insulating film by spin coating, the surface of the first insulating film is subjected to a hydrophilicity improving treatment. A second insulating film for the interlayer insulating film is then formed on the first insulating film by spin coating. The interlayer insulating film is comprised of a stacked insulating film including the first insulating film and the second insulating film thereon. The interlayer insulating film therefore can have improved surface flatness.
    Type: Application
    Filed: February 25, 2016
    Publication date: September 1, 2016
    Inventors: Toshikazu HANAWA, Kazuhide FUKAYA