Abstract: A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.

Abstract: A sensor device includes a substrate which includes an element forming region, a plurality of sensor elements formed in the element forming region, a plurality of connection pads formed on a region of the substrate other than the element forming region, a plurality of first wiring formed on the substrate and electrically connected with the plurality of sensor elements, a plurality of second wiring formed on the substrate and electrically connected with the plurality of connection pads, a plurality of third wiring formed on a different layer to the plurality of first wiring and the plurality of second wiring and formed to intersect with the plurality of first wiring and the plurality of second wiring, and an insulation layer formed between the plurality of first wiring, the plurality of second wiring and the plurality of third wiring.

Abstract: The invention provides a sensor comprising a frame, a plurality of beams extending inwardly from said frame, a weight portion supported by the beams, a piezoelectric-resistor formed on each beam and an insulating layer that covers the piezoelectric-resistor. The piezoelectric-resistor has at least one bend, and a metal wiring is located on the insulting layer positioned at the bend. The metal wiring is connected to the bend via at least two contact holes formed in the insulating layer. Contact holes are formed in the insulating layer positioned at both ends of the piezoelectric-resistor, and a bridge circuit wiring is connected to the piezoelectric-resistor via the contact holes.

Abstract: A mechanical quantity sensor includes a first structure having a fixed portion with an opening, a displaceable portion arranged in the opening and displaceable relative to the fixed portion, and a connection portion connecting the fixed portion and the displaceable portion, a second structure having a weight portion joined to the displaceable portion and a pedestal arranged surrounding the weight portion and joined to the fixed portion, the second structure being arranged and stacked on the first structure, a first base connected to the fixed portion and arranged and stacked on the first structure, and a second base connected to the pedestal and arranged and stacked on the second structure. The weight portion is adjusted in thickness after the first structure is made and before the second base and the second structure are joined.

Abstract: A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.

Abstract: A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.

Abstract: A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.

Abstract: A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.

Abstract: A sensor device includes a substrate which includes an element forming region, a plurality of sensor elements formed in the element forming region, a plurality of connection pads formed on a region of the substrate other than the element forming region, a plurality of first wiring formed on the substrate and electrically connected with the plurality of sensor elements, a plurality of second wiring formed on the substrate and electrically connected with the plurality of connection pads, a plurality of third wiring formed on a different layer to the plurality of first wiring and the plurality of second wiring and formed to intersect with the plurality of first wiring and the plurality of second wiring, and an insulation layer formed between the plurality of first wiring, the plurality of second wiring and the plurality of third wiring.

Abstract: A MIS transistor includes a gate electrode portion, insulating sidewalls formed on side surfaces of the gate electrode portion, source/drain regions and a stress film formed so as to cover the gate electrode portion and the source/drain regions. A height of an upper surface of the gate electrode portion is smaller than a height of an upper edge of each of the insulating sidewalls. A thickness of first part of the stress film located on the gate electrode portion is larger than a thickness of second part of the stress film located on the source/drain regions.

Abstract: A mechanical quantity sensor includes a first structure having a fixed portion with an opening, a displaceable portion arranged in the opening and displaceable relative to the fixed portion, and a connection portion connecting the fixed portion and the displaceable portion, a second structure having a weight portion joined to the displaceable portion and a pedestal arranged surrounding the weight portion and joined to the fixed portion, the second structure being arranged and stacked on the first structure, a first base connected to the fixed portion and arranged and stacked on the first structure, and a second base connected to the pedestal and arranged and stacked on the second structure. The weight portion is adjusted in thickness after the first structure is made and before the second base and the second structure are joined.

Abstract: The invention provides a sensor comprising a frame, a plurality of beams extending inwardly from said frame, a weight portion supported by the beams, a piezoelectric-resistor formed on each beam and an insulating layer that covers the piezoelectric-resistor. The piezoelectric-resistor has at least one bend, and a metal wiring is located on the insulting layer positioned at the bend. The metal wiring is connected to the bend via at least two contact holes formed in the insulating layer. Contact holes are formed in the insulating layer positioned at both ends of the piezoelectric-resistor, and a bridge circuit wiring is connected to the piezoelectric-resistor via the contact holes.

Abstract: A semiconductor device includes: an isolation region formed in a semiconductor substrate; an active region surrounded by the isolation region in the semiconductor substrate; a gate insulating film formed on the active region; and a gate electrode formed across the boundary between the active region and the isolation region adjacent to the active region. The gate electrode includes a first portion which is located above the active region with the gate insulating film interposed therebetween and is entirely made of a silicide in a thickness direction and a second portion which is located above the isolation region and is made of a silicon region and the silicide region covering the silicon region.

Abstract: A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.

Abstract: A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.

Abstract: The following steps are carried out: forming a gate electrode on a semiconductor substrate with a gate insulating film interposed therebetween, forming a dummy gate electrode on the semiconductor substrate with a dummy gate insulating film interposed therebetween and forming another dummy gate electrode on the semiconductor substrate with an insulating film for isolation interposed therebetween; forming a metal film on the semiconductor while exposing the gate electrode and covering the dummy gate electrodes; and subjecting the semiconductor substrate to heat treatment and thus siliciding at least an upper part of the gate electrode. Since the gate electrode is silicided and the dummy gate electrodes are non-silicided, this restrains a short circuit from being caused between the gate electrode and adjacent one of the dummy gate electrodes.

Abstract: A high dielectric constant gate insulating film is formed on an active region of a substrate, and a gate electrode is formed on the high dielectric constant gate insulating film. A high dielectric constant insulating sidewall is formed on a side face of the gate electrode.

Abstract: After a Ni film is deposited on a substrate on which a gate silicon layer is formed, a mask is formed above the gate silicon layer. Then, the Ni film is etched so as to leave a part of the Ni film which is located on the gate silicon layer. This restricts sideways supply of Ni present on the sides of the gate silicon layer. Thereafter, thermal treatment is performed to silicidate the gate silicon layer entirely.

Abstract: The following steps are carried out: forming a gate electrode on a semiconductor substrate with a gate insulating film interposed therebetween, forming a dummy gate electrode on the semiconductor substrate with a dummy gate insulating film interposed therebeweeen and forming another dummy gate electrode on the semiconductor substrate with an insulating film for isolation interposed therebetween; forming a metal film on the semiconductor while exposing the gate electrode and covering the dummy gate electrodes; and subjecting the semiconductor substrate to heat treatment and thus siliciding at least an upper part of the gate electrode. Since the gate electrode is silicided and the dummy gate electrodes are non-silicided, this restrains a short circuit from being caused between the gate electrode and adjacent one of the dummy gate electrodes.

Abstract: A MIS transistor includes a gate electrode portion, insulating sidewalls formed on side surfaces of the gate electrode portion, source/drain regions and a stress film formed so as to cover the gate electrode portion and the source/drain regions. A height of an upper surface of the gate electrode portion is smaller than a height of an upper edge of each of the insulating sidewalls. A thickness of first part of the stress film located on the gate electrode portion is larger than a thickness of second part of the stress film located on the source/drain regions.