Patents by Inventor Kazuhiko Itaya
Kazuhiko Itaya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20050237132Abstract: A film bulk acoustic-wave resonator encompasses (a) a substrate having a cavity, (b) a bottom electrode partially fixed to the substrate, part of the bottom electrode is mechanically suspended above the cavity, (c) a piezoelectric layer disposed on the bottom electrode, a planar shape of the piezoelectric layer is defined by a contour, which covers an entire surface of the bottom electrode in a plan view, (d) a top electrode on the piezoelectric layer, (e) an intermediate electrode located between the substrate and the piezoelectric layer, and at the contour of the piezoelectric layer, the intermediate electrode is connected to the bottom electrode in the inside of the contour, and (f) a bottom electrode wiring connected to the intermediate electrode extending from the contour to an outside of the contour in the plan view, wherein a longitudinal vibration mode along a thickness direction of the piezoelectric layer is utilized.Type: ApplicationFiled: April 19, 2005Publication date: October 27, 2005Applicant: Kabushiki Kaisha ToshibaInventors: Kenya Sano, Naoko Yanase, Kazuhiko Itaya, Takaaki Yasumoto, Ryoichi Ohara, Takashi Kawakubo, Takako Motai
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Publication number: 20050184627Abstract: A piezoelectric thin film device includes an amorphous metal film disposed on a substrate and a piezoelectric film disposed on the amorphous metal. One of crystal axis of the piezoelectric film is aligned in a direction perpendicular to a surface of the amorphous metal.Type: ApplicationFiled: January 27, 2005Publication date: August 25, 2005Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Kenya Sano, Ryoichi Ohara, Naoko Yanase, Takaaki Yasumoto, Kazuhiko Itaya, Takashi Kawakubo, Hiroshi Toyoda, Masahiko Hasunuma, Toshihiko Nagano, Kazuhide Abe, Michihiko Nishigaki, Hironobu Shibata
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Publication number: 20050104204Abstract: A wafer-level package comprises: a first substrate; an electric element provided on the first substrate; a second substrate; an internal electrode pad; a well; and an external electrode pad. The second substrate is opposed to the first substrate with a predetermined gap therebetween. The electric element is provided between the first and second substrates. The internal electrode pad extends onto a first surface of one of the first and the second substrates. The inner electrode pad is connected to the electric element. The well penetrates the one of the first and the second substrates to the internal electrode. The external electrode pad is provided on a second surface of the one of the first and the second substrates and extends onto an inner wall of the well and being connected with the internal electrode pad.Type: ApplicationFiled: September 29, 2004Publication date: May 19, 2005Inventors: Takashi Kawakubo, Takaaki Yasumoto, Kazuhiko Itaya
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Publication number: 20050059375Abstract: A voltage controlled oscillator includes a resonator configured to resonate with an initial oscillation frequency during starting period of oscillation and a steady oscillation frequency during a steady state oscillation. The resonator includes a film bulk acoustic resonator having a series resonance frequency higher than the steady oscillation frequency. A negative resistance circuit configured to drive the resonator, has a positive increment for reactance in the steady state oscillation compared with reactance in the starting period.Type: ApplicationFiled: July 15, 2004Publication date: March 17, 2005Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Kazuhide Abe, Mayumi Morizuka, Ryoichi Ohara, Kenya Sano, Naoko Yanase, Takaaki Yasumoto, Tadahiro Sasaki, Kazuhiko Itaya, Takashi Kawakubo, Hiroshi Yoshida, Ryuichi Fujimoto, Keiichi Yamaguchi, Nobuyuki Itoh, Tooru Kozu, Takeshi Ookubo
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Patent number: 6303405Abstract: A semiconductor light emitting element of nitride compound semiconductors excellent in cleavability, heat radiation and resistance to leakage is made by epitaxially grow a nitride compound semiconductor layers on a substrate of sapphire, for example, and thereafter separating the substrate. For separating the substrate, there are a technique using a abruption mechanism susceptible to a stress such as a “lift-off layer” and a recesses on a substrate. A technique using laser light to cause a local dense heat stress at the abruption mechanism is effective. A nitride compound semiconductor obtained by separating the substrate may be used as a new substrate to epitaxially grow high-quality nitride compound semiconductors thereon.Type: GrantFiled: September 24, 1999Date of Patent: October 16, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Hiroaki Yoshida, Kazuhiko Itaya, Shinji Saito, Johji Nishio, Shinya Nunoue
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Patent number: 6252894Abstract: A semiconductor laser is formed of gallium nitride series compound semiconductor and has a double hetero structure including an MQW (multiple quantum well) active layer held between p-type and n-type AlGaN clad layers. The double hetero structure is held between p-type and n-type contact layers. An InGaN optical absorption layer having an optical absorption coefficient larger than the clad layer which has the same conductivity type as the contact layer and is formed adjacent to the contact layer is formed in at least one of the contact layers and an InAlGaN optical guided mode control layer (layer of small refractive index) having an refractive index smaller than the clad layer is formed on the exterior of the optical absorption layer.Type: GrantFiled: March 5, 1999Date of Patent: June 26, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Katsunobu Sasanuma, Shinji Saito, Genichi Hatakoshi, Kazuhiko Itaya, Masaaki Onomura, Risa Sugiura, Mikio Nakasuji, Hidetoshi Fujimoto, Masahiro Yamamoto, Shinya Nunoue
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Patent number: 6204084Abstract: The present invention provides a nitride system semiconductor device which decreases in cost and improves productivity without heat treatment after the growth and which increases lifetime and reliability by enhancing the quality of a p-type conductive layer, and a method for manufacturing the nitride system semiconductor device. The nitride system semiconductor device has a multilayer structure of an n-type InxGayAlzB1-x-y-zNmPnAs1-m-n (0≦x, 0≦y 0≦z, 0≦x+y+z≦1, 0<m, 0≦n, 0<m+n≦1) layer, a p-type InxGayAlzB1-x-y-zNmPnAs1-m-n (0≦x, 0≦y, 0≦z, 0≦x+y+z≦1, 0<m, 0<n, 0<m+n≦1) layer, and an electrode 22 formed on a substrate. The oxygen concentration of the surface of the p-type InxGayAlzB1-x-y-zNmPnAs1-m-n layer is 5×1018 cm−3 or lower.Type: GrantFiled: February 9, 1999Date of Patent: March 20, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Lisa Sugiura, Mariko Suzuki, Kazuhiko Itaya, Hidetoshi Fujimoto, Johji Nishio, John Rennie, Hideto Sugawara
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Patent number: 6147364Abstract: A gallium nitride (GaN)-based semiconductor device comprises a substrate, a single-crystal layer consisting mainly of GaN with a magnesium (Mg) concentration of N.sub.bg1 cm.sup.-3, the single-crystal layer being provided near the substrate and having a thickness of d.sub.1 .mu.m, and a semiconductor layer consisting mainly of Ga.sub.1-x Al.sub.x N having an Al composition x of at least 0.02 and not higher than 1 and having a thickness of d.sub.2 .mu.m. The single-crystal layer is situated between the substrate and the semiconductor layer, and Mg is added to the semiconductor layer at a concentration of N.sub.Mg cm.sup.-3. The Al composition x, the concentration N.sub.Mg, the concentration N.sub.bg1, the thickness d.sub.1 and the thickness d.sub.2 have the following relationshipd.sub.1 /(1600.times.x)<d.sub.2 <3.6.times.10.sup.-3 .times.logN/(x+0.02)+0.02wherein when N.sub.Mg >N.sub.bg1, N cm.sup.-3 =N.sub.Mg -N.sub.bg1, and when N.sub.Mg .ltoreq.N.sub.Type: GrantFiled: November 20, 1998Date of Patent: November 14, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Kazuhiko Itaya, Hidetoshi Fujimoto, Johji Nishio, Mariko Suzuki, Lisa Sugiura
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Patent number: 6067309Abstract: There is disclosed a compound semiconductor light-emitting device of gallium nitride series having high reliability, which can be operated by a low threshold current and a low operation voltage without deterioration. The device comprises a p-type semiconductor structure having high carrier concentration, which can easily form a low resistance p-side electrode, and which can uniformly implant carriers to an active layer highly efficiently. A p electrode contact layer having Mg added thereto is used as a p-type semiconductor layer. At least a Ga.sub.x2 In.sub.y2 Al.sub.z2 N (x2+y2+z2=1, 0.ltoreq.x2, z2.ltoreq.1, 0<y2.ltoreq.1) smoothing layer is formed on an active layer than the p-type contact layer. On a surface of the p-type contact layer, there is formed a layered structure having a Pt layer, and a Ti layer containing TiN, and a Ti layer in order. An alloy, formed of Pt-semiconductor, is formed between the p-type contact layer and the Pt layer.Type: GrantFiled: September 2, 1997Date of Patent: May 23, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Masaaki Onomura, Kazuhiko Itaya, Genichi Hatakoshi
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Patent number: 5998810Abstract: A semiconductor light-emitting diode exhibiting an oscillation wavelength of 450 nm or less and comprising a substrate, a lower clad layer formed on or above the substrate and mainly composed of a III-V Group compound semiconductor, an active layer formed directly on the lower clad layer and mainly composed of a III-V Group compound semiconductor, and an upper p-type clad layer formed directly on the active layer and mainly composed of a III-V Group compound semiconductor. This semiconductor light-emitting diode is characterized in that the upper p-type clad layer contains Mg, Si and at least one impurities for compensating residual donors.Type: GrantFiled: November 28, 1997Date of Patent: December 7, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Ako Hatano, Yasuo Ohba, Hidetoshi Fujimoto, Kazuhiko Itaya, Johji Nishio
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Patent number: 5932896Abstract: The present invention provides a nitride system semiconductor device which decreases cost and improves productivity without heat treatment after the growth and which increases in lifetime and reliability by enhancing the quality of a p-type conductive layer, and a method for manufacturing the nitride system semiconductor device. The nitride system semiconductor device has a multilayer structure of an n-type In.sub.x Ga.sub.y Al.sub.z B.sub.1-x-y-z N.sub.m P.sub.n As.sub.1-m-n (0.ltoreq.x, 0.ltoreq.y, 0.ltoreq.z, 0.ltoreq.x+y+z.ltoreq.1, 0<m, 0.ltoreq.n, 0<m+n.ltoreq.1) layer, a p-type In.sub.x Ga.sub.y Al.sub.z B.sub.1-x-y-z N.sub.m P.sub.n As.sub.1-m-n (0.ltoreq.x, 0.ltoreq.y, 0.ltoreq.z, 0.ltoreq.x+y+z.ltoreq.1, 0<m, 0.ltoreq.n, 0<m+n.ltoreq.1) layer, and an electrode 22 formed on a substrate. The oxygen concentration of the surface of the p-type In.sub.x Ga.sub.y Al.sub.z B.sub.1-x-y-z N.sub.m P.sub.n As.sub.1-m-n layer is 5.times.10.sup.18 cm.sup.-3 or lower.Type: GrantFiled: September 5, 1997Date of Patent: August 3, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Lisa Sugiura, Mariko Suzuki, Kazuhiko Itaya, Hidetoshi Fujimoto, Johji Nishio, John Rennie, Hideto Sugawara
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Patent number: 5903017Abstract: A gallium nitride (GaN)-based semiconductor device comprises a substrate, a single-crystal layer consisting mainly of GaN with a magnesium (Mg) concentration of N.sub.bg1 cm.sup.-3, the single-crystal layer being provided near the substrate and having a thickness of d.sub.1 .mu.m, and a semiconductor layer consisting mainly of Ga.sub.1-x Al.sub.x N having an Al composition x of at least 0.02 and not higher than 1 and having a thickness of d.sub.2 .mu.m. The single-crystal layer is situated between the substrate and the semiconductor layer, and Mg is added to the semiconductor layer at a concentration of N.sub.Mg cm.sup.-3. The Al composition x, the concentration N.sub.Mg, the concentration N.sub.bg1, the thickness d.sub.1 and the thickness d.sub.2 have the following relationshipd.sub.1 /(1600.times.x)<d.sub.2 <3.6.times.10.sup.-3 .times.logN/(x+0.02)+0.02wherein when N.sub.Mg >N.sub.bg1, N cm.sup.-3 =N.sub.Mg -N.sub.bg1, and when N.sub.Mg .ltoreq.N.sub.Type: GrantFiled: February 20, 1997Date of Patent: May 11, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Kazuhiko Itaya, Hidetoshi Fujimoto, Johji Nishio, Mariko Suzuki, Lisa Sugiura
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Patent number: 5786606Abstract: Disclosed is a semiconductor light-emitting device, comprising a substrate, a thin film formed on the substrate and containing silicon carbide as a main component, a buffer layer formed on the thin film and consisting of a gallium nitride-based material, and a laminate structure formed on the buffer layer and consisting of a plurality of gallium nitride-based material layers, wherein the total thickness of the substrate and the thin film is at least twice the thickness of the buffer layer and is smaller than the thickness of the laminate structure.Type: GrantFiled: December 12, 1996Date of Patent: July 28, 1998Assignee: Kabushiki Kaisha ToshibaInventors: Johji Nishio, Hidetoshi Fujimoto, Kazuhiko Itaya
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Patent number: 5780873Abstract: A semiconductor light-emitting device comprises a semiconductor light-emitting device section of a hexagonal type; and an electrically conductive semiconductor substrate of a cubic type combined into the semiconductor light-emitting device, and having an orientation of its cleavage facet conformed to an orientation of the cleavage facet of one of semiconductor layers forming the semiconductor light-emitting device section. The substrate of the cubic type is cleaved so that the semiconductor light-emitting device section of the hexagonal type is induced to be cleaved, and that a mirror surface can be easily formed.Type: GrantFiled: August 13, 1996Date of Patent: July 14, 1998Assignee: Kabushiki Kaisha ToshibaInventors: Kazuhiko Itaya, Masahiro Yamamoto, Masaaki Onomura, Hidetoshi Fujimoto, Genichi Hatakoshi, Hideto Sugawara, Masayuki Ishikawa, John Rennie, Shinji Saito
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Patent number: 5740192Abstract: A semiconductor laser exhibiting an oscillation wavelength of 450 nm or less and comprising a substrate, a lower clad layer formed on or above the substrate and mainly composed of a III-V Group compound semiconductor, an active layer formed directly on the lower clad layer and mainly composed of a III-V Group compound semiconductor, and an upper p-type clad layer formed directly on the active layer and mainly composed of a III-V Group compound semiconductor. This semiconductor laser is characterized in that the upper p-type clad layer contains Mg, Si and at least one impurities for compensating residual donors.Type: GrantFiled: December 17, 1996Date of Patent: April 14, 1998Assignee: Kabushiki Kaisha ToshibaInventors: Ako Hatano, Yasuo Ohba, Hidetoshi Fujimoto, Kazuhiko Itaya, Johji Nishio
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Patent number: 5466950Abstract: A semiconductor light emitting device. An emitting region has an active layer which emits short wavelength light and long wavelength light caused by inducing some amount of strain. A first reflective layer reflects the short wavelength light to the emitting region, and a second reflective layer reflects the long wavelength light to the emitting region and transmits the short wavelength light. The emitting region is between the first and the second reflective layers. Thereby the short wavelength light is emitted from the second reflective layer.Type: GrantFiled: September 22, 1994Date of Patent: November 14, 1995Assignee: Kabushiki Kaisha ToshibaInventors: Hideto Sugawara, Kazuhiko Itaya
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Patent number: 5459746Abstract: A surface emission type semiconductor light-emitting device includes a substrate, a distributed Bragg reflector formed on the substrate, a light-emitting region formed on the distributed Bragg reflector, a first contact layer, formed on a portion of the light-emitting region and transparent to a wavelength of light emitted from the light-emitting region, for supplying a current to the light-emitting region, and a second contact layer, formed on the light-emitting region to cover a side portion of the first contact layer, for forming a current blocking barrier between the light-emitting region and the second contact layer and supplying the current to the first contact layer.Type: GrantFiled: September 29, 1993Date of Patent: October 17, 1995Assignee: Kabushiki Kaisha ToshibaInventors: Kazuhiko Itaya, Hideto Sugawara
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Patent number: 5410159Abstract: A light-emitting diode, in which light is emitted from a side opposite to a substrate, includes a compound semiconductor substrate of a first conductivity type, a lower cladding layer formed on the substrate end consisting of InGaAlP of the first conductivity type, a light-emitting layer formed on the lower cladding layer and having a quantum well structure constituted by alternately stacking barrier layers and eight or more quantum well layers, and an upper cladding layer formed on the light-emitting layer and consisting of InGaAlP of a second conductivity type.Type: GrantFiled: September 30, 1993Date of Patent: April 25, 1995Assignee: Kabushiki Kaisha ToshibaInventors: Hideto Sugawara, Kazuhiko Itaya
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Patent number: 5389800Abstract: According to the present invention, there is provided a semiconductor light-emitting device including a light-emitting layer having a first semiconductor layer, and formed on a main surface of one side of a semiconductor substrate, an upper-most layer of the light-emitting layer made of a compound semiconductor containing elements from the group II and group VI of the periodic table, the second semiconductor layer formed on the first semiconductor layer, and made of a material having a lattice constant different from that of the material of the semiconductor substrate by at least 2%, the second semiconductor layer having a film thickness of a critical film thickness, the first electrode formed on a main surface of the other side of the semiconductor substrate, and the second electrode formed on the second semiconductor layer.Type: GrantFiled: September 29, 1993Date of Patent: February 14, 1995Assignee: Kabushiki Kaisha ToshibaInventors: Kazuhiko Itaya, Genichi Hatakoshi
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Patent number: 5343486Abstract: According to this invention, a semiconductor laser device includes a compound semiconductor substrate, a double hetero structure formed on the compound semiconductor substrate and having an active layer and first and second cladding layers which interpose the active layer, a current blocking region formed in one facet portion of the double hetero structure in a resonator direction. A reflecting layer is arranged on the other facet of the double hetero structure in the resonator direction and has a reflectance higher than that of a natural cleavage surface, thereby shifting the oscillation wavelength of the laser device to a long wavelength side with respect to the wavelength of spontaneous radiation emitted from one facet of the double hetero structure.Type: GrantFiled: October 19, 1992Date of Patent: August 30, 1994Assignee: Kabushiki Kaisha ToshibaInventors: Kazuhiko Itaya, Genichi Hatakoshi, Koichi Nitta