Patents by Inventor Kazuhiko Nishikawa
Kazuhiko Nishikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200265535Abstract: According to one embodiment, a skill platform system includes a data acquisition unit, a model creation unit and a skill provision unit. The data acquisition unit is configured to acquire data on work of a skilled worker at a first site. The model creation unit is configured to perform modeling a skill of the skilled worker using the data acquired by the data acquisition unit. The skill provision unit is configured to provide the skill of the skilled worker to a second site by using the model created by the model creation unit.Type: ApplicationFiled: May 8, 2020Publication date: August 20, 2020Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA DIGITAL SOLUTIONS CORPORATIONInventors: Koji OKADA, Kazuhiko NISHIKAWA, Yoshikatsu MAEKAWA, Noboru FUJIMAKI, Takashi IWASAKI, Tadayuki NAKAMURA
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Patent number: 8019565Abstract: In a parameter correction circuit in an LSI, a reference resistor element with high precision having a resistance value set to a target value is connected to an external terminal of the LSI. A constant current from a mirror circuit connected to a current supply flows through the reference resistor element. A voltage value generated in the reference resistor element is measured by a voltage measuring circuit. The constant current also flows through a variable resistor element. The resistance value of the variable resistor element is adjusted so that a voltage generated in the variable resistor element corresponds to the voltage generated by the reference resistor element.Type: GrantFiled: May 22, 2009Date of Patent: September 13, 2011Assignee: Panasonic CorporationInventors: Takahiro Bokui, Kazuhiko Nishikawa
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Publication number: 20090234612Abstract: In a parameter correction circuit in an LSI, a reference resistor element with high precision having a resistance value set to a target value is connected to an external terminal of the LSI. A constant current from a mirror circuit connected to a current supply flows through the reference resistor element. A voltage value generated in the reference resistor element is measured by a voltage measuring circuit. The constant current also flows through a variable resistor element. The resistance value of the variable resistor element is adjusted so that a voltage generated in the variable resistor element corresponds to the voltage generated by the reference resistor element.Type: ApplicationFiled: May 22, 2009Publication date: September 17, 2009Applicant: Panasonic CorporationInventors: Takahiro BOKUI, Kazuhiko NISHIKAWA
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Publication number: 20090180366Abstract: When performing data recording, an output pulse of a laser is measured, and a phase setting of a write strategy is corrected so that the pulse is outputted with a correct phase. The phase setting of the write strategy is varied in the state where the laser emits a constant power in a laser control system, and an emitted light of a multipulse corresponding to a mark portion of the laser is converted into a voltage by a photodetector, and then averaged by an LPF. Then, a temporal change against the phase setting is measured and detected at a voltage level, and the phase setting of a write strategy generator circuit is corrected and updated so that the measured level becomes an ideal level.Type: ApplicationFiled: November 6, 2006Publication date: July 16, 2009Inventors: Akihiro Isaji, Kazuhiko Nishikawa, Hiroyuki Yabuno
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Patent number: 7552023Abstract: In a parameter correction circuit in an LSI, a reference resistor element with high precision having a resistance value set to a target value is connected to an external terminal of the LSI. A constant current from a mirror circuit connected to a current supply flows through the reference resistor element. A voltage value generated in the reference resistor element is measured by a voltage measuring circuit. The constant current also flows through a variable resistor element. The resistance value of the variable resistor element is adjusted so that a voltage generated in the variable resistor element corresponds to the voltage generated by the reference resistor element.Type: GrantFiled: December 4, 2006Date of Patent: June 23, 2009Assignee: Panasonic CorporationInventors: Takahiro Bokui, Kazuhiko Nishikawa
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Publication number: 20070088517Abstract: In a parameter correction circuit in an LSI, a reference resistor element with high precision having a resistance value set to a target value is connected to an external terminal of the LSI. A constant current from a mirror circuit connected to a current supply flows through the reference resistor element. A voltage value generated in the reference resistor element is measured by a voltage measuring circuit. The constant current also flows through a variable resistor element. The resistance value of the variable resistor element is adjusted so that a voltage generated in the variable resistor element corresponds to the voltage generated by the reference resistor element.Type: ApplicationFiled: December 4, 2006Publication date: April 19, 2007Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Takahiro Bokui, Kazuhiko Nishikawa
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Patent number: 7152009Abstract: In a parameter correction circuit in an LSI, a reference resistor element with high precision having a resistance value set to a target value is connected to an external terminal of the LSI. A constant current from a mirror circuit connected to a current supply flows through the reference resistor element. A voltage value generated in the reference resistor element is measured by a voltage measuring circuit. The constant current also flows through a variable resistor element. The resistance value of the variable resistor element is adjusted so that a voltage generated in the variable resistor element corresponds to the voltage generated by the reference resistor element.Type: GrantFiled: December 1, 2003Date of Patent: December 19, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Takahiro Bokui, Kazuhiko Nishikawa
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Publication number: 20060258135Abstract: Each of plural semiconductor integrated circuits existing on a semiconductor wafer is provided with a function circuit (3), plural pads (4), and wirings (8) which are electrically connected to the pads (4) and contact bumps of a probe card (7), wherein at least two wirings (8a) and (8b) simultaneously contact one bump (6) in an area other than a bump area, without being in touch with each other, whereby wafer level burn-in is executed. Thereby, even when the chip area is reduced, wafer level burn-in can be carried out.Type: ApplicationFiled: August 31, 2004Publication date: November 16, 2006Applicant: Matsushita Electtric Industrial Co., Ltd.Inventors: Yasuyo Sogawa, Kazuhiko Nishikawa, Masanori Hirofuji
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Publication number: 20040155714Abstract: An oscillation circuit comprises a plurality of constant current supplies for outputting a constant current according to a voltage supplied from a control current terminal; a plurality of switching elements which are charged or discharged by the constant current outputted from the constant current supplies and are turned on or off when exceeding a predetermined threshold voltage; and restriction elements for restricting a charging target voltage or a discharging target voltage at nodes between the constant current supplies and the switching elements to a constant value.Type: ApplicationFiled: January 15, 2004Publication date: August 12, 2004Inventors: Kazuhiko Nishikawa, Seiji Watanabe, Takahiro Bokui
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Publication number: 20040108881Abstract: In a parameter correction circuit to be included in an LSI, a reference resistor element with high precision having a resistance value set to a target value is connected to the external terminal of the LSI. A constant current I1 is allowed to flow from a mirror circuit connected to a current supply to the reference resistor element so that a voltage value generated in the reference resistor element is measured by a voltage measuring circuit. Next, a constant current I1 is allowed to flow in the same manner from the mirror circuit to a variable resistor element to be adjusted and corrected, and at this time, the resistance value of the variable resistor element is adjusted so that a voltage generated in the variable resistor element is allowed to correspond to the voltage generated in the reference resistor element.Type: ApplicationFiled: December 1, 2003Publication date: June 10, 2004Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Takahiro Bokui, Kazuhiko Nishikawa
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Patent number: 6563449Abstract: The successive comparison analog-to-digital (A-D) converter includes a plurality of capacitors, a plurality of first analog switches, a plurality of second analog switches, a plurality of third analog switches, a voltage comparator, and a state controller. Each of the plurality of capacitors has a capacitance weighted with a prescribed weighting factor. Each of the plurality of first analog switches has an on-state resistance weighted with a prescribed weighting factor. In the successive comparison A-D converter, a first analog switch corresponding to a capacitor having a capacitance weighted with a larger weighting factor has an on-state resistance weighted with a smaller weighting factor, whereby a time constant for this capacitor can be reduced. As a result, the difference in time constant between the capacitors is reduced. This enables reduction in time required to precharge (sample and hold) an analog input, improving the A-D conversion speed.Type: GrantFiled: June 12, 2002Date of Patent: May 13, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Haruhisa Takata, Kazuhiko Nishikawa, Seiji Watanabe, Takahiro Bokui
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Patent number: 6528982Abstract: A jitter detector obtains a phase difference between input signals as a digital value to make jitter between the signals easily detectable. The jitter detector includes comparison pulse generator, periodic signal generator, counter and arithmetic unit. The comparison pulse generator outputs one phase difference comparison pulse after another. Each phase difference comparison pulse has a width representing the phase difference between first and second input signals. The periodic signal generator outputs a periodic signal every time a value obtained by accumulating the widths of the phase difference comparison pulses exceeds a predetermined value. Receiving the periodic signal and a clock signal with a period shorter than that of the periodic signal, the counter counts the number of pulses of the clock signal during one period of the periodic signal and outputs a resultant count. And the arithmetic unit detects and outputs a variation in the count as jitter between the first and second input signals.Type: GrantFiled: October 27, 2000Date of Patent: March 4, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Naoshi Yanagisawa, Shiro Dosho, Kazuhiko Nishikawa, Seiji Watanabe, Takahiro Bokui
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Publication number: 20020190887Abstract: The successive comparison analog-to-digital (A-D) converter includes a plurality of capacitors, a plurality of first analog switches, a plurality of second analog switches, a plurality of third analog switches, a voltage comparator, and a state controller. Each of the plurality of capacitors has a capacitance weighted with a prescribed weighting factor. Each of the plurality of first analog switches has an on-state resistance weighted with a prescribed weighting factor. In the successive comparison A-D converter, a first analog switch corresponding to a capacitor having a capacitance weighted with a larger weighting factor has an on-state resistance weighted with a smaller weighting factor, whereby a time constant for this capacitor can be reduced. As a result, the difference in time constant between the capacitors is reduced. This enables reduction in time required to precharge (sample and hold) an analog input, improving the A-D conversion speed.Type: ApplicationFiled: June 12, 2002Publication date: December 19, 2002Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Haruhisa Takata, Kazuhiko Nishikawa, Seiji Watanabe, Takahiro Bokui