Abstract: When an abrupt voltage noise is applied across an anode electrode (A) and a cathode electrode (K), displacement currents (I.sub.10 to I.sub.30) which are responsive to junction capacitances (C.sub.10 to C.sub.30) of respective unit thyristors (ST.sub.1, ST.sub.2, MT) are generated. The displacement currents (I.sub.10 to I.sub.30) flow into a compensation electrode (C) through paths in a P base layer (2) having resistances (R.sub.10 to R.sub.30), and further flow to an external power source through the cathode electrode (K) which is short-circuited with the compensation electrode (C). The paths of the three displacement currents (I.sub.10 to I.sub.30) are separated from each other by resistances (R.sub.12, R.sub.23). Therefore, a forward bias voltage of a junction (D.sub.10) caused by the displacement current (I.sub.10) is attenuated by the displacement current (I.sub.20), while a forward bias voltage of a junction (D.sub.20) caused by the displacement current (I.sub.

Abstract: In order to compatibly implement improvement in withstand voltage and ON-state resistance as well as reduction in turnon loss and improvement in di/dt resistance, an n buffer layer (12) is locally exposed on a lower surface of a semiconductor substrate (160), while a polysilicon additional resistive layer (104) is formed to cover the exposed surface. An anode electrode (101) covering the lower surface of the semiconductor substrate (160) is connected to a p emitter layer (11) and the additional resistive layer (104). Thus, the n buffer layer (12) and the anode electrode (101) are connected with each other through the additional resistive layer (104), whereby a gate trigger current is reduced. Thus, turnon loss is reduced and di/dt resistance is increased. At the same time, the withstand voltage and the ON-state resistance are excellent due to provision of the n buffer layer (12).

Abstract: A MOS semiconductor device which exhibits high switching operations including high turn-on and an excellent self-cooling capability. The device prevents damage to insulation films and electrodes thereof. An IGT includes a multi-layer structure having a p type emitter layer, an n type base layer, a p type base layer and an n type emitter layer superimposed therein. A gate electrode and an overlying gate oxide film are disposed on a recessed surface of the multi-layer structure. A cathode electrode is located only in and around a cathode surface so that most of the top surface of the gate electrode is uncovered. Via an intervening cathode distortion snubbering plate, the cathode electrode is in pressure contact with a cathode electrode body. The gate and the cathode electrodes have a reduced capacitance therebetween. The cathode electrode body serves to cool the cathode electrode. The gate electrode and the gate oxide film are protected from stress, and hence, will not be damaged by stress.

Abstract: Coned disc springs (84, 86) lie between a gate extracting electrode (80G) held in a ringlike recess (63) of an external cathode electrode (60K) and a bottom surface of the ringlike recess (63). A semiconductor body (30) is pressed against an anode distortion buffering plate (50A) by a urging force of the coned disc springs (84, 86) for vertical positional fixation of the semiconductor body (30). This enables the semiconductor body to be prevented from damages and deformation in a full press-pack type semiconductor device.

Abstract: A self arc-extinguishing thyristor having a large main current is disclosed. An n-type base layer is formed on a p-type anode layer. The n-type base layer includes in its top center portion a relatively heavily doped p+-type region which is surrounded by p-type region. A p-type base layer is locally coated at its top surface with a relatively thin first n-type emitter layer and a relatively thick second n-type emitter layer. A gate electrode buried in a gate oxide film is disposed on two channel regions and areas around the same. This structure suppresses a current amplification factor of a parasitic thyristor which is formed by the n-type base layer, the p-type region and the first n-type emitter layer, which in turn represses latching up of the parasitic thyristor.

Abstract: Coned disc springs (84, 86) lie between a gate extracting electrode (80G) held in a ringlike recess (63) of an external cathode electrode (60K) and a bottom surface of the ringlike recess (63). A semiconductor body (30) is pressed against an anode distortion buffering plate (50A) by a urging force of the coned disc springs (84, 86) for vertical positional fixation of the semiconductor body (30). This enables the semiconductor body to be prevented from damages and deformation in a full press-pack type semiconductor device.

Abstract: A flat-pack type semiconductor device has an anode buffer plate (50) on a semiconductor element (1). The anode buffer plate consists of a central position (51) and a plurality of arms (61, 63) extending therefrom. Each of the arms has a straight portion (61a) placed on a guide ring (70) and a hooked-portion (61b) inserted in the gap (73) between the guide ring and an insulating cylinder (10).

Abstract: A light triggered thyristor having a light-receiving structure which has a light-receiving surface for receiving incident light on its top surface. The light-receiving structure comprises a base region of a first electrically conductive type exposed in the light-receiving surface, and an emitter region of a second electrically conductive type exposed in a central portion of the light-receiving surface as well as in an area extending from a part of the central portion thereof outwardly beyond the light-receiving surface, and an electrode connected to the base region and the emitter region outside the light-receiving surface, wherein a lateral resistance in the area of the base region between areas underlying the emitter region is aprpoximately equal to or larger than a lateral resistance in the area thereof below the emitter region.

Abstract: One surface of a cathode sliding compensator is finished as an irregular surface while another surface thereof is finished as a sliding surface. The irregular surface is arranged to contact with a cathode electrode layer of a semiconductor element while the sliding surface is arranged to contact with a cathode conductor, and junction surfaces therebetween are electrically and mechanically connected by pressurization. Thus, the irregular surface bites into the cathode electrode layer to attain excellent electrical and mechanical connection between the cathode electrode layer and the cathode sliding compensator, while slidingness can be effectively retained between the cathode conductor and the cathode sliding compensator by the function of the sliding surface.

Abstract: A thyristor comprising a thyristor element with a trigger section 1a formed on the surface thereof. The thyristor element is attached to a metal disk 2 having at least three faces 2a on its periphery which are all a common distance l from the center of the trigger section. One electrode unit 4 is attached to the opposing surface of the metal disk and a second electrode unit 3 is attached to the opposing surface of the thyristor element. A trigger signal guide 10 penetrates an insulating tube 5 surrounding the element and one end of the guide is positioned on the central axis of the insulating tube. Positioning members 11 of equal width are compressively inserted between the insulating tube and the faces of the metal disk.

Abstract: An optical coupling device for coupling an optical fiber to a photo-semiconductor device wherein the light emitting end of the optical fiber is disposed in spaced relation to the light sensitive area of the photo-semiconductor device includes a light transmitting transparent resin completely filling the space between the end of the optical fiber and the light sensitive area of the photo-semiconductor device and a light reflecting resin film completely covering the exposed surface of the transparent resin.