Patents by Inventor Kazuhiko Saito

Kazuhiko Saito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6969649
    Abstract: A DRAM has, in one embodiment, a plurality of word lines each having its upper and side surfaces covered with a first insulating film, a plurality of bit lines each being provided so as to be insulated from and transverse to the word lines and being covered with a second insulating film, and a plurality of memory cells each provided at an intersection between one word line and one bit line and including a capacitor and a memory cell selection transistor, in which contact holes for connection between semiconductor regions and capacitors and between semiconductor regions and bit lines are formed in self-alignment and the second insulating film is made of a material having a permittivity smaller than that of the first insulating film.
    Type: Grant
    Filed: March 29, 2004
    Date of Patent: November 29, 2005
    Assignees: Hitachi, Ltd., Texas Instruments Incorporated
    Inventors: Toshihiro Sekiguchi, Yoshitaka Tadaki, Keizo Kawakita, Hideo Aoki, Toshikazu Kumai, Kazuhiko Saito, Michio Nishimura, Michio Tanaka, Katsuo Yuhara, Shinya Nishio, Toshiyuki Kaeriyama, Songsu Cho
  • Publication number: 20040179389
    Abstract: A DRAM has, in one embodiment, a plurality of word lines each having its upper and side surfaces covered with a first insulating film, a plurality of bit lines each being provided so as to be insulated from and transverse to the word lines and being covered with a second insulating film, and a plurality of memory cells each provided at an intersection between one word line and one bit line and including a capacitor and a memory cell selection transistor, in which contact holes for connection between semiconductor regions and capacitors and between semiconductor regions and bit lines are formed in self-alignment and the second insulating film is made of a material having a permittivity smaller than that of the first insulating film.
    Type: Application
    Filed: March 29, 2004
    Publication date: September 16, 2004
    Inventors: Toshihiro Sekiguchi, Yoshitaka Tadaki, Keizo Kawakita, Hideo Aoki, Toshikazu Kumai, Kazuhiko Saito, Michio Nishimura, Michio Tanaka, Katsuo Yuhara, Shinya Nishio, Toshiyuki Kaeriyama, Songsu Cho
  • Patent number: 6753219
    Abstract: A DRAM has, in one embodiment, a plurality of word lines each having its upper and side surfaces covered with a first insulating film, a plurality of bit lines each being provided so as to be insulated from and transverse to the word lines and being covered with a second insulating film, and a plurality of memory cells each provided at an intersection between one word line and one bit line and including a capacitor and a memory cell selection transistor, in which contact holes for connection between semiconductor regions and capacitors and between semiconductor regions and bit lines are formed in self-alignment and the second insulating film is made of a material having a permittivity smaller than that of the first insulating film.
    Type: Grant
    Filed: August 23, 2002
    Date of Patent: June 22, 2004
    Assignees: Hitachi, Ltd., Texas Instruments, Inc.
    Inventors: Toshihiro Sekiguchi, Yoshitaka Tadaki, Keizo Kawakita, Hideo Aoki, Toshikazu Kumai, Kazuhiko Saito, Michio Nishimura, Michio Tanaka, Katsuo Yuhara, Shinya Nishio, Toshiyuki Kaeriyama, Songsu Cho
  • Patent number: 6713979
    Abstract: In the invention, pairs of output transistors are provided. An actuator having an inductance is connected to nodes formed between the pairs of output transistors. A drive circuit for the actuator is arranged such that the actuator is driven by causing a drive current to flow into the inductance. The drive circuit has an overvoltage detection circuit for detecting whether or not a voltage appearing at the nodes of the output transistor pairs exceeds a supply voltage by a first predetermined level and whether or not the voltage becomes lower than a ground level by a second predetermined level. Output transistors connected to the nodes are activated by an output from the overvoltage detection circuit.
    Type: Grant
    Filed: July 25, 2002
    Date of Patent: March 30, 2004
    Assignees: Kabushiki Kaisha Sankyo Seiki Seisakusho, Sanyo Electric Co., Ltd.
    Inventors: Hayato Naito, Noriaki Okada, Kazuhiko Saito
  • Patent number: 6521105
    Abstract: In order to provide technology where film deposition speed and Sr/Ti composition ratio is constant even when forming dielectric films consecutively on a plurality of substrates using sputtering techniques, a sputtering apparatus is provided with an opposing electrode located about the periphery of a mounting table at an inner bottom surface of a vacuum chamber. Further, a multiplicity of holes are formed at the surface of the opposing electrode so that the surface area of the opposing electrode is large. Sputtering dielectric material becomes affixed to the surface of the opposing electrode so that a dielectric film is formed at this surface. The charge density of charge distributed at the surface of the opposing electrode is therefore small compared with the related art even when positive charge is distributed. The potential of the opposing electrode surface can therefore be kept substantially at earth potential.
    Type: Grant
    Filed: July 23, 2001
    Date of Patent: February 18, 2003
    Assignee: Ulvac, Inc.
    Inventors: Noriaki Tani, Kazuhiko Saito, Koukou Suu
  • Publication number: 20030020420
    Abstract: In the invention, pairs of output transistors are provided. An actuator having an inductance is connected to nodes formed between the pairs of output transistors. A drive circuit for the actuator is arranged such that the actuator is driven by causing a drive current to flow into the inductance. The drive circuit has an overvoltage detection circuit for detecting whether or not a voltage appearing at the nodes of the output transistor pairs exceeds a supply voltage by a first predetermined level and whether or not the voltage becomes lower than a ground level by a second predetermined level. Output transistors connected to the nodes are activated by an output from the overvoltage detection circuit.
    Type: Application
    Filed: July 25, 2002
    Publication date: January 30, 2003
    Applicant: KABUSHIKI KAISHA SANKYO SEIKI SEISAKUSHO, SANYO
    Inventors: Hayato Naito, Noriaki Okada, Kazuhiko Saito
  • Publication number: 20020192905
    Abstract: A DRAM has, in one embodiment, a plurality of word lines each having its upper and side surfaces covered with a first insulating film, a plurality of bit lines each being provided so as to be insulated from and transverse to the word lines and being covered with a second insulating film, and a plurality of memory cells each provided at an intersection between one word line and one bit line and including a capacitor and a memory cell selection transistor, in which contact holes for connection between semiconductor regions and capacitors and between semiconductor regions and bit lines are formed in self-alignment and the second insulating film is made of a material having a permittivity smaller than that of the first insulating film.
    Type: Application
    Filed: August 23, 2002
    Publication date: December 19, 2002
    Inventors: Toshihiro Sekiguchi, Yoshitaka Tadaki, Keizo Kawakita, Hideo Aoki, Toshikazu Kumai, Kazuhiko Saito, Michio Nishimura, Michio Tanaka, Katsuo Yuhara, Shinya Nishio, Toshiyuki Kaeriyama, Songsu Cho
  • Publication number: 20020043457
    Abstract: In order to provide technology where film deposition speed and Sr/Ti composition ratio is constant even when forming dielectric films consecutively on a plurality of substrates using sputtering techniques, a sputtering apparatus of the present invention is provided with an opposing electrode located about the periphery of a mounting table at an inner bottom surface of a vacuum chamber. Further, a multiplicity of holes are formed at the surface of the opposing electrode so that the surface area of the opposing electrode is large. Sputtered dielectric material becomes affixed to the surface of the opposing electrode so that a dielectric film is formed at this surface. The charge density of charge distributed at the surface of the opposing electrode is therefore small compared with the related art even when positive charge is distributed. The potential of the opposing electrode surface can therefore be kept substantially at earth potential.
    Type: Application
    Filed: July 23, 2001
    Publication date: April 18, 2002
    Inventors: Noriaki Tani, Kazuhiko Saito, Koukou Suu
  • Patent number: 5937290
    Abstract: In an embodiment of a method of manufacturing semiconductor integrated circuit devices according to the present invention, word lines are provided in a straight form, which serve as gate electrodes of two selecting MOSFETs formed symmetrical about a center portion of an active region surrounded by a LOCOS oxide film on a semiconductor substrate, and bit lines have straight segments and protruding segments. Each protruding segment is formed to protrude from the bit line and is connected through a first contact hole to a first semiconductor region formed at the center portion of the active region. The straight line segments and the protruding segments are formed separately by two separate exposure steps.
    Type: Grant
    Filed: May 27, 1997
    Date of Patent: August 10, 1999
    Assignees: Hitachi, Ltd., Texas Instruments Incorporated
    Inventors: Toshihiro Sekiguchi, Yoshitaka Tadaki, Keizo Kawakita, Katsuo Yuhara, Kazuhiko Saito, Shinya Nishio, Michio Tanaka, Michio Nishimura, Toshiyuki Kaeriyama, Songsu Cho
  • Patent number: 5844396
    Abstract: The voice coil motor drive unit for a magnetic disk device includes a voice coil motor, a VCM driver, and a waveshaping unit. The voice coil motor has a coil and is driven in positioning and moving a magnetic head. The VCM driver supplies a driving current to the coil of the voice coil motor through a pair of power supply lines. The waveshaping unit shapes the waveform of the driving current supplied from the VCM driver to the voice coil motor into a waveform having a smooth leading edge. The waveshaping unit has a capacitor connected between the power supply lines, and a pair of Zener diodes having the same Zener characteristics and identical poles connected to two poles of the capacitor to be opposite to each other. Each of the Zener diodes has a Zener voltage which is set higher than a voltage applied to the coil in positioning the magnetic head, and lower than the voltage applied to the coil in moving the magnetic head.
    Type: Grant
    Filed: April 16, 1997
    Date of Patent: December 1, 1998
    Assignee: NEC Corporation
    Inventors: Masanori Iwabuchi, Kazuhiko Saito
  • Patent number: 5649184
    Abstract: In a data base processing system using a multiprocessor system, the data base processing system includes: a storage unit provided in the shared memory for storing data base management information representing either an object of a shared processing operation or an object of a local processing operation for every resource; an access management unit provided in each of the processor modules for performing an access control for an access request to the data base under either the shared processing operation or the local processing operation in accordance with the data base management information, the shared processing operation being symmetrically performed, and the local processing operation being asymmetrically performed in each processor module; and a control unit provided in the processor module for controlling the shared/local conversion in such a way that: an access state of the resource is managed for every resource; when a frequency of the access is unevenly distributed to a particular processor module, t
    Type: Grant
    Filed: March 20, 1990
    Date of Patent: July 15, 1997
    Assignee: Fujitsu Limited
    Inventors: Katsumi Hayashi, Masaaki Mitani, Yutaka Sekine, Tomohiro Hayashi, Kazuhiko Saito, Yoshinori Shimogai
  • Patent number: 5473482
    Abstract: A magnetic disc apparatus controls the output timing of control current data by use of a servo estimation type observer. Servo information is read from a servo sector of a magnetic disc, decoded, and used to calculate control current data. Before the servo information of the following servo sector is fully decoded, the calculated control current data from the previously read servo sector is output, converted to a current, and sent to the actuator of a magnetic head.
    Type: Grant
    Filed: October 15, 1993
    Date of Patent: December 5, 1995
    Assignee: NEC Corporation
    Inventors: Kazuhiko Saito, Toshiyuki Okawa
  • Patent number: 5083632
    Abstract: A saddle type, off-road vehicle, comprising a frame, an engine supported by the frame, at least one front wheel, a pair of rear wheels disposed on opposite sides of the frame, a seat supported on an upper portion of the frame, and a storage receptacle provided above the rear frame. The storage receptacle includes an element for reinforcing the strength and rigidity of an inner surface thereof and a partition for dividing the receptacle into a plurality of storage sections.
    Type: Grant
    Filed: April 12, 1989
    Date of Patent: January 28, 1992
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Kazuhiko Saito, Yoshio Oka
  • Patent number: D516084
    Type: Grant
    Filed: December 29, 2003
    Date of Patent: February 28, 2006
    Assignee: Honda Motor Co., Ltd.
    Inventors: Kazuhiko Saito, Yukinori Kawaguchi
  • Patent number: D523024
    Type: Grant
    Filed: July 23, 2003
    Date of Patent: June 13, 2006
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Kazuhiko Saito, Yukinori Kawaguchi
  • Patent number: D325360
    Type: Grant
    Filed: April 12, 1989
    Date of Patent: April 14, 1992
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Kazuhiko Saito, Yutaka Kawasaki
  • Patent number: D326436
    Type: Grant
    Filed: September 18, 1989
    Date of Patent: May 26, 1992
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Gen Tamura, Yukinori Kawaguchi, Kazuhiko Saito
  • Patent number: D327237
    Type: Grant
    Filed: September 21, 1989
    Date of Patent: June 23, 1992
    Assignee: Honda R&D North America, Inc.
    Inventors: Shiro Miyamoto, Kazuhiko Saito, Yutaka Kawasaki, Tetsuya Nakazawa
  • Patent number: D327457
    Type: Grant
    Filed: September 25, 1990
    Date of Patent: June 30, 1992
    Assignee: Honda R&D North America, Inc.
    Inventor: Kazuhiko Saito
  • Patent number: D427110
    Type: Grant
    Filed: September 2, 1999
    Date of Patent: June 27, 2000
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Kazuhiko Saito, Kazuhiko Yokoyaya