Patents by Inventor Kazuhiro Fujinuma
Kazuhiro Fujinuma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9041565Abstract: To set an optimum offset voltage and detect an NRZ signal with a very small amplitude. An NRZ signal amplifying device 2 includes: input-side voltage detection means 13 for detecting a high-level voltage and a low-level voltage of an input signal to the main amplifier 12; output-side voltage detection means 14 for detecting the two signals inverted relative to each other; and offset voltage control means 15 for calculating a center voltage between the detected high-level voltage and low-level voltage, setting an offset voltage at which the center voltage is the center of an appropriate input range of the main amplifier 12 to the offset circuit 11, and finely adjusting the offset voltage, such that a voltage difference between the detected two signals inverted relative to each other and a polarity change point is close to 0.Type: GrantFiled: June 25, 2014Date of Patent: May 26, 2015Assignee: ANRITSU CORPORATIONInventors: Wataru Aoba, Kazuhiro Fujinuma, Takeshi Wada
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Publication number: 20150067416Abstract: To set an optimum offset voltage and detect an NRZ signal with a very small amplitude. An NRZ signal amplifying device 2 includes: input-side voltage detection means 13 for detecting a high-level voltage and a low-level voltage of an input signal to the main amplifier 12; output-side voltage detection means 14 for detecting the two signals inverted relative to each other; and offset voltage control means 15 for calculating a center voltage between the detected high-level voltage and low-level voltage, setting an offset voltage at which the center voltage is the center of an appropriate input range of the main amplifier 12 to the offset circuit 11, and finely adjusting the offset voltage, such that a voltage difference between the detected two signals inverted relative to each other and a polarity change point is close to 0.Type: ApplicationFiled: June 25, 2014Publication date: March 5, 2015Inventors: Wataru AOBA, Kazuhiro FUJINUMA, Takeshi WADA
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Patent number: 8143926Abstract: It is an object of the present invention to provide a data signal generating apparatus which is small in size, and can output the serial data in a desired sequence without assuming an indefinite state as well as being capable of dealing with the jitter measurement.Type: GrantFiled: October 7, 2010Date of Patent: March 27, 2012Assignee: Anritsu CorporationInventors: Kazuhiko Yamaguchi, Kazuhiro Fujinuma
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Patent number: 8005134Abstract: The object of the present invention is to provide a waveform shaping device and an error measurement device which can perform a waveform shaping operation with the sufficient amplitude margin, even if the mark ratio of the inputted data signal is significantly varied and the amplitude of the inputted data signal is decreased.Type: GrantFiled: March 26, 2007Date of Patent: August 23, 2011Assignee: Anritsu CorporationInventors: Kazuhiro Yamane, Kazuhiro Fujinuma
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Patent number: 8005180Abstract: The object of the present invention is to provide a data decision apparatus and an error measurement apparatus which can set the phase of the clock to the optimum state with respect to the data signal without continuously sweeping of the phase, and can keep the state for a long time.Type: GrantFiled: March 26, 2007Date of Patent: August 23, 2011Assignee: Anritsu CorporationInventors: Kazuhiro Fujinuma, Kazuhiro Yamane
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Patent number: 7893740Abstract: A data signal generating apparatus with a data output unit for outputting m-bit parallel data and a data synchronization clock signal synchronized with the parallel data in response to a data request signal produced by dividing the frequency of a reference clock signal by “m.” An m:1 multiplexer for receiving the parallel data in response to a latch signal produced by dividing the frequency of the reference clock signal by “m,” and outputting, at a rate of the reference clock signal, data synchronization serial data. Synchronization means for comparing the phases of the data synchronization clock signal and the latch signal, for synchronizing the parallel data with the latch signal, and for producing a control signal, and which delays, on the basis of the control signal, the reference clock signal or a divided clock signal (dividing the frequency of the reference clock signal by “m” or less).Type: GrantFiled: March 26, 2007Date of Patent: February 22, 2011Assignee: Anritsu CorporationInventors: Kazuhiko Yamaguchi, Kazuhiro Fujinuma
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Publication number: 20110026573Abstract: It is an object of the present invention to provide a data signal generating apparatus which is small in size, and can output the serial data in a desired sequence without assuming an indefinite state as well as being capable of dealing with the jitter measurement.Type: ApplicationFiled: October 7, 2010Publication date: February 3, 2011Applicant: ANRITSU CORPORATIONInventors: Kazuhiko Yamaguchi, Kazuhiro Fujinuma
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Patent number: 7671691Abstract: A quadrature modulator divides a first signal input as a local signal into an I channel signal and a Q channel signal orthogonal to each other and outputs a second signal having a desired phase delay corresponding to direct current voltages as for the first signal by giving the direct current voltages Vi and Vq to the I channel signal and the Q channel signal, respectively. A phase comparison unit detects a phase difference ? between the first signal and the second signal. A setting unit sets the desired phase delay. A controller section controls the direct current voltages supplied to the I channel signal and the Q channel signal respectively in the quadrature modulator so that an output value corresponding to the phase difference ? detected by the phase comparison unit is equal to a value corresponding to the desired phase delay set by the setting unit, and controls the direct current voltages to be the direct current voltages Vi and Vq satisfying the relation of Vi=cos ? and Vq=sin ?.Type: GrantFiled: February 1, 2007Date of Patent: March 2, 2010Assignee: Anritsu CorporationInventors: Satoru Shiratsuchi, Kazuhiro Fujinuma, Kazuhiko Yamaguchi
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Publication number: 20090279595Abstract: The object of the present invention is to provide a waveform shaping device and an error measurement device which can perform a waveform shaping operation with the sufficient amplitude margin, even if the mark ratio of the inputted data signal is significantly varied and the amplitude of the inputted data signal is decreased.Type: ApplicationFiled: March 26, 2007Publication date: November 12, 2009Applicant: ANRITSU CORPORATIONInventors: Kazuhiro Yamane, Kazuhiro Fujinuma
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Patent number: 7613239Abstract: A digital signal offset adjusting apparatus has a capacitor causing an output terminal to pass a high frequency band of an input digital signal. A first coil has one end connected to an input terminal and a second coil has one end connected to an output. An operational amplifier has an input connected to another end of the first coil, a second input connected to a direct current voltage generator and an output connected to another end of the second coil. The operational amplifier outputs a signal obtained by subtracting and combining the low frequency band, the direct current component and a direct current bias voltage. A frequency characteristic compensating circuit is connected between a reference point and the second input of the operational amplifier. The gain of the operational amplifier increases with a component having a higher frequency from among low frequency bands of the input digital signal.Type: GrantFiled: September 29, 2005Date of Patent: November 3, 2009Assignee: Anritsu CorporationInventors: Satoru Shiratsuchi, Kazuhiro Fujinuma, Sumio Saito
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Publication number: 20090252270Abstract: The object of the present invention is to provide a data decision apparatus and an error measurement apparatus which can set the phase of the clock to the optimum state with respect to the data signal without continuously sweeping of the phase, and can keep the state for a long time.Type: ApplicationFiled: March 26, 2007Publication date: October 8, 2009Applicant: ANRITSU CORPORATIONInventors: Kazuhiro Fujinuma, Kazuhiro Yamane
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Publication number: 20090243680Abstract: It is an object of the present invention to provide a data signal generating apparatus which is small in size, and can output the serial data in a desired sequence without assuming an indefinite state as well as being capable of dealing with the jitter measurement.Type: ApplicationFiled: March 26, 2007Publication date: October 1, 2009Applicant: ANRITSU CORPORATIONInventors: Kazuhiko Yamaguchi, Kazuhiro Fujinuma
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Publication number: 20090140787Abstract: A quadrature modulator divides a first signal input as a local signal into an I channel signal and a Q channel signal orthogonal to each other and outputs a second signal having a desired phase delay corresponding to direct current voltages as for the first signal by giving the direct current voltages Vi and Vq to the I channel signal and the Q channel signal, respectively. A phase comparison unit detects a phase difference ? between the first signal and the second signal. A setting unit sets the desired phase delay. A controller section controls the direct current voltages supplied to the I channel signal and the Q channel signal respectively in the quadrature modulator so that an output value corresponding to the phase difference ? detected by the phase comparison unit is equal to a value corresponding to the desired phase delay set by the setting unit, and controls the direct current voltages to be the direct current voltages Vi and Vq satisfying the relation of Vi=cos ? and Vq=sin ?.Type: ApplicationFiled: February 1, 2007Publication date: June 4, 2009Inventors: Satoru Shiratsuchi, Kazuhiro Fujinuma, Kazuhiro Fujinuma, Kazuhiko Yamaguchi
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Publication number: 20070129903Abstract: A digital signal offset adjusting apparatus has a capacitor (21) causing an output terminal (20b) to pass through a high frequency band of an input digital signal in order to transmit a wideband digital signal without generating a waveform distortion, a first coil (23), one end of which is connected to an input terminal (20a), the first coil passing a low frequency band and a direct current component to another end, a second coil (22), one end of which is connected to an output end, a operational amplifier (31a), a first input end of which is connected to the other end of the first coil, a second input end of which is connected to a direct current voltage generator (25), an output end of which is connected to the other end of the second coil, the operational amplifier outputting to another end of the second coil a signal obtained by subtracting and combining the low frequency band, the direct current component and a direct current bias voltage, and a frequency characteristic compensating circuit (35) connecteType: ApplicationFiled: September 29, 2005Publication date: June 7, 2007Applicant: Anritsu CorporationInventors: Satoru Shiratsuchi, Kazuhiro Fujinuma, Sumio Saito