Patents by Inventor Kazuhiro Ikezawa

Kazuhiro Ikezawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7820007
    Abstract: This silicon electrode plate for plasma etching is a silicon electrode plate for plasma etching with superior durability including silicon single crystal which, in terms of atomic ratio, contains 3 to 11 ppba of boron, and further contains a total of 0.5 to 6 ppba of either or both of phosphorus and arsenic.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: October 26, 2010
    Assignees: Sumco Corporation, Mitsubishi Materials Corporation
    Inventors: Hideki Fujiwara, Kazuhiro Ikezawa, Hiroaki Taguchi, Naofumi Iwamoto, Toshinori Ishii, Takashi Komekyu
  • Patent number: 7501665
    Abstract: A semiconductor light emitting device comprises: a semiconductor laminated body; an electrode provided on the first major surface of the semiconductor laminated body; and a reflecting layer provided on the second major surface side of the semiconductor laminated body. The semiconductor laminated body includes a light emitting layer and having a first major surface and a second major surface located on the opposite side of the first major surface. A light emitted from the light emitting layer is extracted from the first major surface. The reflecting layer is conductive and reflective of the light emitted from the light emitting layer. At least a portion of the reflecting layer, which is opposed to the electrode, has irregularities.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: March 10, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hidefumi Yasuda, Yuko Kato, Kazuhiro Ikezawa, Toshiyuki Terada
  • Publication number: 20080251799
    Abstract: A visible light emitting device includes: three types of LED elements stacked one on another; and first and second optical filters. Each of the LED elements has a light emitting layer configured to emit light of one of three primary colors. Each of the first and second optical filters is disposed between two adjacent ones of the LED elements, and each of the first and second optical filters is operable to reflect or absorb a shorter wavelength light of the lights emitted from two adjacent LED elements.
    Type: Application
    Filed: April 9, 2008
    Publication date: October 16, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kazuhiro Ikezawa
  • Publication number: 20070181868
    Abstract: This silicon electrode plate for plasma etching is a silicon electrode plate for plasma etching with superior durability including silicon single crystal which, in terms of atomic ratio, contains 3 to 11 ppba of boron, and further contains a total of 0.5 to 6 ppba of either or both of phosphorus and arsenic.
    Type: Application
    Filed: March 30, 2005
    Publication date: August 9, 2007
    Applicants: SUMCO CORPORATION, Mitsubishi Materials Corporation
    Inventors: Hideki Fujiwara, Kazuhiro Ikezawa, Hiroaki Taguchi, Naofumi Iwamoto, Toshinori Ishii, Takashi Komekyu
  • Publication number: 20070096116
    Abstract: A semiconductor light emitting device comprises: a semiconductor laminated body; an electrode provided on the first major surface of the semiconductor laminated body; and a reflecting layer provided on the second major surface side of the semiconductor laminated body. The semiconductor laminated body includes a light emitting layer and having a first major surface and a second major surface located on the opposite side of the first major surface. A light emitted from the light emitting layer is extracted from the first major surface. The reflecting layer is conductive and reflective of the light emitted from the light emitting layer. At least a portion of the reflecting layer, which is opposed to the electrode, has irregularities.
    Type: Application
    Filed: October 30, 2006
    Publication date: May 3, 2007
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hidefumi Yasuda, Yuko Kato, Kazuhiro Ikezawa, Toshiyuki Terada
  • Patent number: 6818197
    Abstract: A wafer of the invention is a silicon wafer of 0.02 &OHgr;cm or less in resistivity for deposition of an epitaxial layer, and the number of crystal originated particles (COP) and the number of interstitial-type large dislocation loops (L/D) are respectively 0 to 10 per wafer. A wafer of the invention is an epitaxial wafer having an epitaxial layer being 0.1 &OHgr;cm or more in resistivity and 0.5 to 5 &mgr;m in thickness formed on this wafer by means of a CVD method. A wafer of the invention is OSF-free and hardly makes traces of COP and L/D appear on the surface of an epitaxial layer when the epitaxial layer is formed. By heat treatment in a semiconductor device manufacturing process after the epitaxial layer is formed, BMDs occur uniformly and highly in density in the wafer and a uniform IG effect can be obtained in the wafer.
    Type: Grant
    Filed: March 18, 2003
    Date of Patent: November 16, 2004
    Assignee: Mitsubishi Materials Silicon Corporation
    Inventors: Kazuhiro Ikezawa, Ken Nakajima, Tamiya Karashima, Hiroyuki Shiraki
  • Publication number: 20030157341
    Abstract: A wafer of the invention is a silicon wafer of 0.02 &OHgr;cm or less in resistivity for deposition of an epitaxial layer, and the number of crystal originated particles (COP) and the number of interstitial-type large dislocation loops (L/D) are respectively 0 to 10 per wafer. A wafer of the invention is an epitaxial wafer having an epitaxial layer being 0.1 &OHgr;cm or more in resistivity and 0.5 to 5 &mgr;m in thickness formed on this wafer by means of a CVD method. A wafer of the invention is OSF-free and hardly makes traces of COP and L/D appear on the surface of an epitaxial layer when the epitaxial layer is formed. By heat treatment in a semiconductor device manufacturing process after the epitaxial layer is formed, BMDs occur uniformly and highly in density in the wafer and a uniform IG effect can be obtained in the wafer.
    Type: Application
    Filed: March 18, 2003
    Publication date: August 21, 2003
    Inventors: Kazuhiro Ikezawa, Ken Nakajima, Tamiya Karashima, Hiroyuki Shiraki
  • Patent number: 5573591
    Abstract: A monocrystal pulling apparatus according to the Czochralski technique, provided with a flow controller which guides a carrier gas supplied from the top of a pulling cheer to the surface of a melt of a material forming the monocrystal and exhausts the silicon oxide vaporizing from the surface of the melt to the outside of the pulling chamber and which surrounds the pulled monocrystal near the surface of the melt and is provided partially inside a crucible, wherein the flow controller has a tubular portion which has an outer diameter smaller than the inner diameter of the crucible and extends substantially perpendicularly along the direction of downward flow of the carrier gas, a constricted diameter portion which constricts in diameter from the bottom end of the tubular portion and forms a bottom gap with the pulled monocrystal, and an engagement portion which projects out from the top of the tubular portion and forms a top gap at the outer circumference of the tubular portion of the flow controller by suppor
    Type: Grant
    Filed: April 20, 1995
    Date of Patent: November 12, 1996
    Assignees: Mitsubishi Materials Silicon Corporation, Mitsubishi Materials Corporation
    Inventors: Kazuhiro Ikezawa, Hiroshi Yasuda, Akira Tanikawa, Hiroyuki Kojima, Koji Hosoda, Yoshifumi Kobayashi
  • Patent number: 5476065
    Abstract: A monocrystal pulling apparatus according to the Czochralski technique, provided with a flow controller which guides a carrier gas supplied from the top of a pulling chamber to the surface of a melt of a material forming the monocrystal and exhausts the silicon oxide vaporizing from the surface of the melt to the outside of the pulling chamber and which surrounds the pulled monocrystal near the surface of the melt and is provided partially inside a crucible, wherein the flow controller has a tubular portion which has an outer diameter smaller than the inner diameter of the crucible and extends substantially perpendicularly along the direction of downward flow of the carrier gas, a constricted diameter portion which constricts in diameter from the bottom end of the tubular portion and forms a bottom gap with the pulled monocrystal, and an engagement portion which projects out from the top of the tubular portion and forms a top gap at the outer circumference of the tubular portion of the flow controller by supp
    Type: Grant
    Filed: January 28, 1994
    Date of Patent: December 19, 1995
    Assignees: Mitsubishi Materials Silicon Corp., Mitsubishi Materials Corp.
    Inventors: Kazuhiro Ikezawa, Hiroshi Yasuda, Akira Tanikawa, Hiroyuki Kojima, Koji Hosoda, Yoshifumi Kobayashi