Patents by Inventor Kazuhiro Kobushi

Kazuhiro Kobushi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5396312
    Abstract: An apparatus for optically forming a pattern on an object using a reticle having an original pattern to be optically projected. The apparatus is equipped with a storage circuit for storing information indicative of an exposure condition for the reticle, the storage circuit being attached to the reticle. An exposure apparatus reads out the information from the storage circuit so as to project the original pattern of the reticle on the object in accordance with the read information so that a pattern corresponding to the original pattern is formed on the object. This arrangement can automatically and accurately set the exposure condition in the exposure apparatus.
    Type: Grant
    Filed: October 26, 1992
    Date of Patent: March 7, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuhiro Kobushi, Hironao Iwai
  • Patent number: 4954454
    Abstract: A method for fabricating a semiconductor device which is capable of enlarging diameter of crystal grain of a polycrystalline conductor by a heat treatment which is carried out after surface lower portion of the polycrystalline conductor is made amorphous with ion-implanting atoms in the polycrystalline conductor by predetermined accelerating energy to thereby improve the uniformity of size of crystal grain. By this method, the uniformity of impurity concentration distribution is improved in the polycrystalline conductor and also in the impurity diffusion area, and further, the uniformity of resistance of a resistor or conductor formed by the polycrystalline conductor is improved.
    Type: Grant
    Filed: June 30, 1989
    Date of Patent: September 4, 1990
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuhiro Kobushi, Shuichi Kameyama, Tadao Komeda
  • Patent number: 4897368
    Abstract: Disclosed is a method of fabricating a polycidegate in semiconductor device which has a step of forming a conductor film of polysilicon on a substrate, a step of forming an ion implanted layer by implanting nitrogen ions into the polysilicon conductor film, and a step of forming a low resistance conductor film of titanium on the non-monocyrstalline conductor film. When a field effect transistor is formed by this method, using titanium nitride and/or TiSi.sub.2 alloy of the polysilicon conductor and low resistance conductor of titanium by heat treatment as a gate electrode material, the thickness of the alloyed layer is uniform, and breakdown of the gate insulating film due to local diffusion of low resistance conductor is not induced. In other embodiments, oxygen ions and silicon ions are also employed to form thin layers of tunnel oxide and amorphous silicon, respectively.
    Type: Grant
    Filed: May 19, 1988
    Date of Patent: January 30, 1990
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuhiro Kobushi, Shuichi Kameyama, Shozo Okada, Kazuhiko Tsuji
  • Patent number: 4839302
    Abstract: In a method for fabricating a favorable bipolar semiconductor device in which the extrinsic base and emitter diffusion holes are formed in self-alignment, an optimum structure between the extrinsic base and instrinsic base is realized. By controlling the concentration of the impurities in the extrinsic base, the base contact and emitter region can be finely formed in self-alignment, and occurence of damage or contamination in the intrinsic base region is inhibited.
    Type: Grant
    Filed: October 13, 1987
    Date of Patent: June 13, 1989
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shuichi Kameyama, Tadao Komeda, Kazuhiro Kobushi, Hiroyuki Sakai