Abstract: Provided an electrophotographic electro-conductive member that can stably suppress an occurrence of fogging in an electrophotographic image. The member comprises a support having an electro-conductive outer surface, and an electro-conductive layer on the outer surface of the support, the electro-conductive layer having a matrix including a cross-linked product of a first rubber, and domains dispersed in the matrix, the domains each includes a cross-linked product of a second rubber and an electro-conductive particle, at least some of the domains is exposed to the outer surface of the electro-conductive member to constitute protrusions on an outer surface of the member, the outer surface of the electro-conductive member is constituted by the matrix and the domains exposed to the outer surface of the electrophotographic electro-conductive member, the electrophotographic electro-conductive member has an impedance of 1.0×103? or more and 1.0×108? or less, and some of the domains satisfy two specific requirements.

Abstract: A semiconductor device (10) includes a metallic base plate (22) provided with an upper surface (22a) and a lower surface (22b), a plurality of insulating substrates (24) provided on the upper surface (22a), and a plurality of semiconductor elements (26) and (28) mounted side by side on the respective insulating substrates (24). Annular grooves (50) and (52) for storing insulating grease are provided on the lower surface (22b) of the base plate (22). A surface (40a) of a cooling fin (40) is superimposed on the lower surface (22b) with insulating grease (42) interposed therebetween and insides of the annular grooves (50) and (52) are filled with the insulating grease (42).

Abstract: A semiconductor device (10) includes a metallic base plate (22) provided with an upper surface (22a) and a lower surface (22b), a plurality of insulating substrates (24) provided on the upper surface (22a), and a plurality of semiconductor elements (26) and (28) mounted side by side on the respective insulating substrates (24). Annular grooves (50) and (52) for storing insulating grease are provided on the lower surface (22b) of the base plate (22). A surface (40a) of a cooling fin (40) is superimposed on the lower surface (22b) with insulating grease (42) interposed therebetween and insides of the annular grooves (50) and (52) are filled with the insulating grease (42).

Abstract: A semiconductor switching device includes a package, and a semiconductor switching element provided in the package and having a collector electrode and an emitter electrode. A main collector terminal and a main emitter terminal reflect voltage drop generated during application of current by a floating component in the package. A second collector terminal and a second emitter terminal detect a voltage between the collector electrode and the emitter electrode without reflecting the voltage drop. A third emitter terminal is arranged close to the second emitter terminal, and detects the voltage drop generated between the main emitter terminal and the second emitter terminal.

Abstract: A semiconductor switching device includes a package, and a semiconductor switching element provided in the package and having a collector electrode and an emitter electrode. A main collector terminal and a main emitter terminal reflect voltage drop generated during application of current by a floating component in the package. A second collector terminal and a second emitter terminal detect a voltage between the collector electrode and the emitter electrode without reflecting the voltage drop. A third emitter terminal is arranged close to the second emitter terminal, and detects the voltage drop generated between the main emitter terminal and the second emitter terminal.

Abstract: An inductance in a path (R1) from a gate electrode (3G) of a GTO (3) through a gate driver (4) and a node (13) to a cathode electrode (3K) is determined so that a turn-off gain may be not more than 1. At a turn-off, a main current (I.sub.A) is entirely commutated from the gate electrode (3G) towards the node (13) through the gate driver (4) in a direction reverse to a turn-off control current (I.sub.G) A peak voltage suppressing circuit (5) clamps an anode-cathode voltage (V.sub.A-K) which rises on, to a prescribed voltage value for a prescribed time. This prevents losses caused by a snubber circuit. Commutation of a main current to the gate prevents locally concentrating in the cathode side of the semiconductor switching element, to thereby increase the turn off capability of the semiconductor switching element. Further, this prevents or reduces dissipation of large amount produced by a discharge of the electric charges from a snubber capacitor.

Abstract: An inductance in a path (R1) from a gate electrode (3G) of a GTO (3) through a gate driver (4) and a node (13) to a cathode electrode (3K) is determined so that a turn-off gain may be not more than 1. At a turn-off, a main current (IA) is entirely commutated from the gate electrode (3G) towards the node (13) through the gate driver (4) in a direction reverse to a turn-off control current (IG) A peak voltage suppressing circuit (5) clamps an anode-cathode voltage (VA-K) which rises on, to a prescribed voltage value for a prescribed time. This prevents losses caused by a snubber circuit. Commutation of a main current to the gate prevents locally concentrating in the cathode side of the semiconductor switching element, to thereby increase the turn off capability of the semiconductor switching element. Further, this prevents or reduces dissipation of large amount produced by a discharge of the electric charges from a snubber capacitor.